Patents by Inventor Yao Ning CHAN

Yao Ning CHAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220059727
    Abstract: The present disclosure provides a semiconductor device and a semiconductor component. The semiconductor device includes an active structure, a ring-shaped semiconductor contact layer, a first electrode, and an insulating layer. The active structure has a first-conductivity-type semiconductor layer, a second-conductivity-type semiconductor layer, and an active layer located between the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer. The ring-shaped semiconductor contact layer is located on the second-conductivity-type semiconductor layer and having a first inner sidewall and a first outer sidewall. The first electrode has an upper surface and covers the ring-shaped semiconductor contact layer. The insulating layer covers the first electrode and the active structure and has a second inner sidewall and a second outer sidewall. The first inner sidewall is not flush with the second inner sidewall in a vertical direction.
    Type: Application
    Filed: August 19, 2021
    Publication date: February 24, 2022
    Inventors: Hao-Chun Liang, Wei-Shan Yeoh, Yao-Ning Chan, Yi-Ming Chen, Shih-Chang Lee
  • Publication number: 20210305456
    Abstract: The present disclosure provides a semiconductor light-emitting device and a semiconductor light-emitting component. The semiconductor light-emitting device includes a substrate, a first semiconductor contact layer, a semiconductor light-emitting stack including an active layer, a first-conductivity-type contact structure, a second semiconductor contact layer, a second-conductivity-type contact structure and a first electrode pad. The first-conductivity-type contact structure is electrically connected to the first semiconductor contact layer. The second-conductivity-type contact structure is electrically connected to the second semiconductor contact layer. The first-conductivity-type contact structure has a first bottom surface and a first top surface, and the active layer has a second bottom surface and a second top surface.
    Type: Application
    Filed: March 24, 2021
    Publication date: September 30, 2021
    Inventors: Jian-Zhi CHEN, Yen-Chun TSENG, Hui-Fang KAO, Yao-Ning CHAN, Yi-Tang LAI, Yun-Chung CHOU, Shih-Chang LEE, Chen OU
  • Patent number: 10738363
    Abstract: The present invention provides an analyzer for predicting a prognosis of cancer radiotherapy, including a detection device and an arithmetic device. In a specimen, expression levels of a plurality of microRNAs (miRNAs) can be detected by the detection device. The miRNAs includes hsa-miR-130a-3p, hsa-miR-215-5p, hsa-miR-29a-3p, hsa-let-7b-5p, hsa-miR-19b-3p, hsa-miR-374a-5p and hsa-miR-148a-3p. The expression levels of miRNAs can be analyzed by the arithmetic device using logistic regression, and the analyzed values can be used to determine that the prognosis of cancer radiotherapy is poor or good.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: August 11, 2020
    Assignees: NATIONAL CENTRAL UNIVERSITY
    Inventors: Nian-Han Ma, Tao-Sheng Chung, An-Lun Li, Yao-Ning Chan, Chien-Lung Chen
  • Patent number: 10461223
    Abstract: A semiconductor device includes a semiconductor stack comprising a surface, and an electrode structure comprises an electrode pad formed on the surface, and the electrode structure further comprises a first extending electrode, a second extending electrode and a third extending electrode connecting to the electrode pad. The first extending electrode is closer to a periphery of the surface than the third extending electrode is, and the second extending electrode is between the first extending electrode and the third extending electrode. From a top view of the semiconductor device, the first extending electrode, the second extending electrode and the third extending electrode respectively include a first curve having a first angle ?1, a second curve having a second angle ?2 and a third curve having a third angle ?3, wherein ?3>?2>?1 .
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: October 29, 2019
    Assignee: Epistar Corporation
    Inventors: Yung-Fu Chang, Hsin-Chan Chung, Hung-Ta Cheng, Wen-Luh Liao, Shih-Chang Lee, Chih-Chiang Lu, Yi-Ming Chen, Yao-Ning Chan, Chun-Fu Tsai
  • Publication number: 20190081213
    Abstract: A semiconductor device includes a semiconductor stack comprising a surface, and an electrode structure comprises an electrode pad formed on the surface, and the electrode structure further comprises a first extending electrode, a second extending electrode and a third extending electrode connecting to the electrode pad. The first extending electrode is closer to a periphery of the surface than the third extending electrode is, and the second extending electrode is between the first extending electrode and the third extending electrode.
    Type: Application
    Filed: September 12, 2018
    Publication date: March 14, 2019
    Inventors: Yung-Fu CHANG, Hsin-Chan CHUNG, Hung-Ta CHENG, Wen-Luh LIAO, Shih-Chang LEE, Chih-Chiang LU, Yi-Ming CHEN, Yao-Ning CHAN, Chun-Fu TSAI
  • Patent number: 10084115
    Abstract: The present disclosure provides an optoelectronic device comprising a semiconductor stack comprising a first side having a first length; a first contact layer on the semiconductor stack; and a second contact layer on the semiconductor stack opposite to the first contact layer, wherein the second contact layer is not overlapped with the first contact layer in a vertical direction; and wherein the second contact layer comprises multiple contact regions separated from each other and arranged in a two-dimensional array, wherein a first distance between the two adjacent contact regions is between 0.8% and 8% of the first length.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: September 25, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Yi-Ming Chen, Shih-Chang Lee, Yao-Ning Chan, Tzu-Chieh Hsu
  • Patent number: 10038128
    Abstract: The present disclosure provides a method of manufacturing a light-emitting device, which comprises providing a first substrate and a plurality of semiconductor stacked blocks comprising a first semiconductor stacked block and a second semiconductor stacked block on the first substrate, and each of the plurality semiconductor stacked blocks comprises a first conductive-type semiconductor layer, a light-emitting layer on the first conductive-type semiconductor layer, and a second conductive-type semiconductor layer on the light-emitting layer; conducting a separating step to separate the first semiconductor stacked block from the first substrate, and the second semiconductor stacked block remains on the first substrate; providing an element substrate comprising a patterned metal layer; and conducting a bonding step to bond and align the first semiconductor stacked block or the second semiconductor stacked block with the patterned metal layer.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: July 31, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Fu Huang, Yao-Ning Chan, Tzu Chieh Hsu, Yi-ming Chen, Hsin-Chih Chiu, Chih-Chiang Lu, Chia-liang Hsu, Chun-Hsien Chang
  • Publication number: 20180057891
    Abstract: The present invention provides an analyzer for predicting a prognosis of cancer radiotherapy, including a detection device and an arithmetic device. In a specimen, expression levels of a plurality of microRNAs (miRNAs) can be detected by the detection device. The miRNAs includes hsa-miR-130a-3p, hsa-miR-215-5p, hsa-miR-29a-3p, hsa-let-7b-5p, hsa-miR-19b-3p, hsa-miR-374a-5p and hsa-miR-148a-3p. The expression levels of miRNAs can be analyzed by the arithmetic device using logistic regression, and the analyzed values can be used to determine that the prognosis of cancer radiotherapy is poor or good.
    Type: Application
    Filed: August 30, 2017
    Publication date: March 1, 2018
    Inventors: Nian-Han MA, Tao-Sheng CHUNG, An-Lun LI, Yao-Ning CHAN, Chien-Lung CHEN
  • Publication number: 20180006206
    Abstract: The present disclosure provides a method of manufacturing a light-emitting device, which comprises providing a first substrate and a plurality of semiconductor stacked blocks comprising a first semiconductor stacked block and a second semiconductor stacked block on the first substrate, and each of the plurality semiconductor stacked blocks comprises a first conductive-type semiconductor layer, a light-emitting layer on the first conductive-type semiconductor layer, and a second conductive-type semiconductor layer on the light-emitting layer; conducting a separating step to separate the first semiconductor stacked block from the first substrate, and the second semiconductor stacked block remains on the first substrate; providing an element substrate comprising a patterned metal layer; and conducting a bonding step to bond and align the first semiconductor stacked block or the second semiconductor stacked block with the patterned metal layer.
    Type: Application
    Filed: September 12, 2017
    Publication date: January 4, 2018
    Inventors: Chien-Fu HUANG, Yao-Ning CHAN, Tzu Chieh HSU, Yi-ming CHEN, Hsin-Chih CHIU, Chih-Chiang LU, Chia-liang HSU, Chun-Hsien CHANG
  • Patent number: 9793458
    Abstract: The present disclosure provides a method of manufacturing a light-emitting device, which comprises providing a first substrate and a plurality of semiconductor stacked blocks on the first substrate, and each of the plurality semiconductor stacked blocks comprises a first conductive-type semiconductor layer, a light-emitting layer on the first conductive-type semiconductor layer, and a second conductive-type semiconductor layer on the light-emitting layer; wherein there is a trench separating two adjacent semiconductor stacked blocks on the first substrate, and a width of the trench is less than 10 ?m; and conducting a first separating step to separate a first semiconductor stacked block of the plurality of semiconductor stacked blocks from the first substrate and keep a second semiconductor stacked block on the first substrate.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: October 17, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Fu Huang, Yao-Ning Chan, Tzu Chieh Hsu, Yi Ming Chen, Hsin-Chih Chiu, Chih-Chiang Lu, Chia-Liang Hsu, Chun-Hsien Chang
  • Publication number: 20170194532
    Abstract: The present disclosure provides an optoelectronic device comprising a semiconductor stack comprising a first side having a first length; a first contact layer on the semiconductor stack; and a second contact layer on the semiconductor stack opposite to the first contact layer, wherein the second contact layer is not overlapped with the first contact layer in a vertical direction; and wherein the second contact layer comprises multiple contact regions separated from each other and arranged in a two-dimensional array, wherein a first distance between the two adjacent contact regions is between 0.8% and 8% of the first length.
    Type: Application
    Filed: March 23, 2017
    Publication date: July 6, 2017
    Inventors: Chun-Yu LIN, Yi-Ming Chen, Shih-Chang LEE, Yao-Ning Chan, Tzu-Chieh Hsu
  • Publication number: 20170170375
    Abstract: The present disclosure provides a method of manufacturing a light-emitting device, which comprises providing a first substrate and a plurality of semiconductor stacked blocks on the first substrate, and each of the plurality semiconductor stacked blocks comprises a first conductive-type semiconductor layer, a light-emitting layer on the first conductive-type semiconductor layer, and a second conductive-type semiconductor layer on the light-emitting layer; wherein there is a trench separating two adjacent semiconductor stacked blocks on the first substrate, and a width of the trench is less than 10 ?m; and conducting a first separating step to separate a first semiconductor stacked block of the plurality of semiconductor stacked blocks from the first substrate and keep a second semiconductor stacked block on the first substrate.
    Type: Application
    Filed: February 21, 2017
    Publication date: June 15, 2017
    Inventors: Chien-Fu HUANG, Yao-Ning CHAN, Tzu Chieh HSU, Yi Ming CHEN, Hsin-Chih CHIU, Chih-Chiang LU, Chia-Liang HSU, Chun-Hsien CHANG
  • Patent number: 9640728
    Abstract: An optoelectronic device is provided. The optoelectronic device comprises: an optoelectronic system for emitting light; multiple contact regions on the optoelectronic system and separated from one another; and multiple fingers on the optoelectronic system and opposite to the multiple contact regions; wherein a first contact region in the multiple contact regions is between two adjacent fingers, and a first distance between the first contact region and one of the adjacent fingers is between 5% and 50% of a second distance between the two adjacent fingers.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: May 2, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Yi-Ming Chen, Shih-Chang Lee, Yao-Ning Chan, Tzu-Chieh Hsu
  • Patent number: 9614127
    Abstract: The present disclosure provides a method of manufacturing a light-emitting device, which comprises providing a first substrate and a plurality of semiconductor stacked blocks on the first substrate, and each of the plurality semiconductor stacked blocks comprises a first conductive-type semiconductor layer, a light-emitting layer on the first conductive-type semiconductor layer, and a second conductive-type semiconductor layer on the light-emitting layer; wherein there is a trench separating two adjacent semiconductor stacked blocks on the first substrate, and a width of the trench is less than 10 ?m; and conducting a first separating step to separate a first semiconductor stacked block of the plurality of semiconductor stacked blocks from the first substrate and keep a second semiconductor stacked block on the first substrate.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: April 4, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Fu Huang, Yao-Ning Chan, Tzu Chieh Hsu, Yi Ming Chen, Hsin-Chih Chiu, Chih-Chiang Lu, Chia-Liang Hsu, Chun-Hsien Chang
  • Patent number: D818974
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: May 29, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Hui-Fang Kao, Tzu-Chieh Hsu, Yao-Ning Chan, Yi-Ming Chen
  • Patent number: D894850
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: September 1, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Fu Tsai, Yao-Ning Chan, Yi-Tang Lai, Yi-Ming Chen, Shih-Chang Lee
  • Patent number: D928104
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: August 17, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Hui-Fang Kao, Yao-Ning Chan, Hao-Chun Liang, Shih-Chang Lee
  • Patent number: D944218
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: February 22, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Hui-Fang Kao, Yao-Ning Chan, Hao-Chun Liang, Shih-Chang Lee
  • Patent number: D972769
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: December 13, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Hui-Fang Kao, Yao-Ning Chan, Yi-Tang Lai, Yun-Chung Chou, Shih-Chang Lee, Chen Ou
  • Patent number: D1008198
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: December 19, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Yao-Ning Chan, Tzu-Yun Feng, Yun-Ya Chang