Patents by Inventor Yao-Tung Liu

Yao-Tung Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6787375
    Abstract: Within a method for electrical testing a series of microelectronic fabrication die fabricated within a microelectronic fabrication substrate, there is first electrically tested the series of microelectronic fabrication die to determine at least one sub-series of electrically unacceptable microelectronic fabrication die. Similarly, there is also determined whether the microelectronic fabrication substrate may be reworked. Finally, there is also electrically retested only the at least one sub-series of electrically unacceptable microelectronic fabrication die, and only if the microelectronic substrate may be reworked. The method provides for enhanced efficiency when electrically testing the series of microelectronic fabrication die.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: September 7, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Yung-Min Cheng, Yao-Tung Liu, Chun-Tsung Yang, Juei-Feng Hsu
  • Patent number: 6724211
    Abstract: A system for monitoring semiconductor testing tools comprises a tester testing a semiconductor device, whereby a test result is derived, a storage device storing a logic function corresponding to the semiconductor device, and a processor receiving the test result and the logic function from the tester and storage device respectively, and applying the logic function to the test result for validation.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: April 20, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., LTD
    Inventors: Shun-An Chen, Li-Chung Lin, Yao-Tung Liu, Yung-Min Cheng, Ming-Hui Lin, Hsin-Hom Chen, Chun-Sheng Wang
  • Publication number: 20030211639
    Abstract: Within a method for electrical testing a series of microelectronic fabrication die fabricated within a microelectronic fabrication substrate, there is first electrically tested the series of microelectronic fabrication die to determine at least one sub-series of electrically unacceptable microelectronic fabrication die. Similarly, there is also determined whether the microelectronic fabrication substrate may be reworked. Finally, there is also electrically retested only the at least one sub-series of electrically unacceptable microelectronic fabrication die, and only if the microelectronic substrate may be reworked. The method provides for enhanced efficiency when electrically testing the series of microelectronic fabrication die.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 13, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co, Ltd.
    Inventors: Yung-Min Cheng, Yao-Tung Liu, Chun-Tsung Yang, Juei-Feng Hsu
  • Patent number: 6480794
    Abstract: To allocate products for machines on a manufacturing line, provide a standard test time. Minimize total test time with respect to production scheduling. Form a supply demand matrix table for products and machines for product allocation. Find the grid location with minimum testing time. Provide maximum time allocation from a machine at the corresponding position on the matrix table. Determine the grid location with the next minimum testing time. Loop back to provide a maximum allocation of remaining time from the corresponding machine and repeat looping back until no demand is left. Find need for an optimum testing process by testing whether only one machine can test the product and no quantity is allocated to a machine. If YES branch to calculate utilization per machine. If NO, decide whether NCOL+NLIN−1=NVB. If YES perform optimum testing. If NO, branch to calculate machine utilization per machine.
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: November 12, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ming-Hsiu Hsieh, Fu-Kang Lai, Wen-Feng Wu, Yi-Hsin Chan, Yao-Tung Liu, Yi-Chin Hsu
  • Publication number: 20020158624
    Abstract: A system for monitoring semiconductor testing tools comprises a tester testing a semiconductor device, whereby a test result is derived, a storage device storing a logic function corresponding to the semiconductor device, and a processor receiving the test result and the logic function from the tester and storage device respectively, and applying the logic function to the test result for validation.
    Type: Application
    Filed: September 12, 2001
    Publication date: October 31, 2002
    Inventors: Shun-An Chen, Li-Chung Lin, Yao-Tung Liu, Yung-Min Cheng, Ming-Hui Lin, Hsin-Hom Chen, Chun-Sheng Wang
  • Patent number: 6356797
    Abstract: A method for automatic scheduling of a production plan. The automatic scheduling system arranges different kinds of production plans and defines a first priority lot, a second priority lot and a normal lot in testing factories. The testing processes of the first priority lot is to decide the testing machine first, then exchanged with a running lot on this testing machine when a test piece is completed. For the second priority lot, after decides the testing machine, the second priority lot is exchanged with a running lot on the testing machine when the running lot is completed. For the normal lot, the procedure is to check if the testing machine is available and need to be setup, then use a setup reduce method to reduce the setup frequency if more than one machine is available and needs to be setup. The key to reduce setup method selects the testing machine which has minimum impact for the subsequent testing lot to get efficient use of the testing machine.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: March 12, 2002
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hsiu Hsieh, Wen-Feng Wu, Min-Huey Tsai, Yao-Tung Liu, Lieh-Chang Tai
  • Patent number: 5906713
    Abstract: A method of preparing biodegradable, water-resistant, moldable paper board or molded paper utensil which includes the steps of: (a) preparing a pulp aqueous slurry at a consistency of about 4%; (b) adding surfactant selected from the group consisting of rosin soap, sodium oleate, sodium stearate, and sodium palmitate to the pulp aqueous slurry; (c) adding between 25-75% weight of a biodegradable and water-resistant agent selected from the group consisting of calcium stearate, cellulose stearate, calcium palmitate and cellulose palmitate to the pulp aqueous slurry to form a slurry mixture; (d) refining the slurry mixture at a consistency of about 4% to a desired drainage; (e) diluting the refined slurry mixture and adding thereto an aggregating agent as alum to form a furnish; (f) forming the furnish to obtain a dry moldable soft paper board; (g) preheating the moldable paper board obtained in step (f) at a temperature from 110.degree. to 170.degree. C.
    Type: Grant
    Filed: November 22, 1995
    Date of Patent: May 25, 1999
    Assignee: Taiwan Suger Corporation
    Inventors: Wen-Fuei Yeh, Long-Huei Wang, Yao-Tung Liu, Ying-Yu Cheng
  • Patent number: 5863388
    Abstract: A biodegradable and water-resistant paper product which has the compositions of 8-30% weight of a biodegradable and water-resistant agent selected from the group consisting of calcium stearate, cellulose stearate, calcium palmitate and cellulose palmitate, 92-70% weight of pulp, based on the sum of the dry weight of pulp and water-resistant agent; surfactant selected from the group consisting of rosin soap, sodium oleate, sodium stearate, and sodium palmitate; and aggregating agent as alum.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: January 26, 1999
    Assignee: Taiwan Sugar Corporation
    Inventors: Wen-Fuei Yeh, Long-Huei Wang, Yao-Tung Liu, Ying-Yu Cheng
  • Patent number: 5618387
    Abstract: A method of preparing biodegradable water-resistant paper utensils which includes the steps of: (a) preparing a pulp aqueous slurry at a consistency of about 4%; (b) adding surfactant to the slurry; (c) thereafter, adding between 8 and 30 percent weight of a biodegradable and water-resistant agent to the slurry to form a slurry mixture; (d) refining the slurry mixture at a consistency of about 4 percent to a desired drainage; (e) diluting the refined slurry mixture and adding an aggregating agent thereto to form a furnish; and (f) after step (e), forming the furnish to obtain biodegradable, water-resistant paper board or directly a paper utensil. The forming step can be through a hot-press at a temperature of 115.degree. to 170.degree. C.
    Type: Grant
    Filed: January 9, 1995
    Date of Patent: April 8, 1997
    Assignee: Taiwan Sugar Corp.
    Inventors: Wen-Fuei Yeh, Long-Huei Wang, Yao-Tung Liu, Ying-Yu Cheng