Abstract: A signal transmission method suitable for DDR for driving a connecting pad includes a level shifting circuit including up and down level shifters, a buffer circuit including up and down buffer units, and an output circuit. The level shifting circuit, disposed between a DDR operating voltage and a ground voltage, receives an input signal in a first operating voltage equal to the ground voltage and a second operating voltage smaller than the DDR operating voltage. The up buffer unit is disposed between the DDR operating voltage and a first reference voltage, and the down buffer unit is disposed between the ground voltage and a second reference voltage equal to the second operating voltage. The up and down level shifters adopt IO devices, and other components adopt core devices. The first reference voltage is a difference between the DDR operating voltage and the second reference voltage.

Abstract: An input/output (IO) circuit with high voltage tolerance is provided. In an integrated circuit, the IO circuit includes a charge pump for generating a bias voltage higher than an internal operating voltage of the charge pump itself, and a switch between an external circuit and an internal circuit of the integrated circuit. When the switch conducts between the external circuit and the internal circuit, the switch provides a clamping voltage according to the bias voltage and a cross voltage of the switch, so that a voltage of the internal circuit is bounded by the clamping voltage to prevent the internal circuit from over-voltage.

Abstract: A signal transmission method suitable for DDR for driving a connecting pad includes a level shifting circuit including up and down level shifters, a buffer circuit including up and down buffer units, and an output circuit. The level shifting circuit, disposed between a DDR operating voltage and a ground voltage, receives an input signal in a first operating voltage equal to the ground voltage and a second operating voltage smaller than the DDR operating voltage. The up buffer unit is disposed between the DDR operating voltage and a first reference voltage, and the down buffer unit is disposed between the ground voltage and a second reference voltage equal to the second operating voltage. The up and down level shifters adopt IO devices, and other components adopt core devices. The first reference voltage is a difference between the DDR operating voltage and the second reference voltage.

Abstract: An output driver for driving a pad includes a pull-up circuit and a pull-down circuit. The pull-up circuit includes first, second and third first-type transistors. The first and second first-type transistors are commonly controlled by a first logic signal. The third first-type transistor is connected in parallel to the second first-type transistor. The pull-down circuit includes first, second and third second-type transistors. The first and second second-type transistors are commonly controlled by a second logic signal. The third second-type transistor is connected in parallel to the second second-type transistor. The pull-up circuit is configured such that a response speed of the first first-type transistor to the first logic signal is lower than that of the second first-type transistor to the first logic signal.

Abstract: An output driver for driving a pad includes a pull-up circuit and a pull-down circuit. The pull-up circuit includes first, second and third first-type transistors. The first and second first-type transistors are commonly controlled by a first logic signal. The third first-type transistor is connected in parallel to the second first-type transistor. The pull-down circuit includes first, second and third second-type transistors. The first and second second-type transistors are commonly controlled by a second logic signal. The third second-type transistor is connected in parallel to the second second-type transistor. The pull-up circuit is configured such that a response speed of the first first-type transistor to the first logic signal is lower than that of the second first-type transistor to the first logic signal.

Abstract: A computer implemented method, system, and product for finding correspondence between terms in two different languages. The method includes the steps of: creating a technical term set and a general term set for each of i) a first language and ii) a second language, creating two bipartite graphs, where each graph corresponds to one of the two languages, and connects the technical term set and general term set of each language, respectively, with weighted links based on corpus information, creating a third bipartite graph by creating weighted links between general terms in the first language and general terms in the second language by using a translation dictionary, creating an association matrix M corresponding to the three bipartite graphs, calculating a similarity matrix Q by calculation of an inverse matrix, and outputting correspondence between the technical term sets of the first and second language on basis of the similarity matrix.

Abstract: A computer implemented method, system, and product for finding correspondence between terms in two different languages. The method includes the steps of: creating a technical term set and a general term set for each of i) a first language and ii) a second language, creating two bipartite graphs, where each graph corresponds to one of the two languages, and connects the technical term set and general term set of each language, respectively, with weighted links based on corpus information, creating a third bipartite graph by creating weighted links between general terms in the first language and general terms in the second language by using a translation dictionary, creating an association matrix M corresponding to the three bipartite graphs, calculating a similarity matrix Q by calculation of an inverse matrix, and outputting correspondence between the technical term sets of the first and second language on basis of the similarity matrix.

Abstract: A computer implemented method, system, and product for finding correspondence between terms in two different languages. The method includes the steps of: creating a technical term set and a general term set for each of i) a first language and ii) a second language, creating two bipartite graphs, where each graph corresponds to one of the two languages, and connects the technical term set and general term set of each language, respectively, with weighted links based on corpus information, creating a third bipartite graph by creating weighted links between general terms in the first language and general terms in the second language by using a translation dictionary, creating an association matrix M corresponding to the three bipartite graphs, calculating a similarity matrix Q by calculation of an inverse matrix, and outputting correspondence between the technical term sets of the first and second language on basis of the similarity matrix.

Abstract: A computer implemented method, system, and product for finding correspondence between terms in two different languages. The method includes the steps of: creating a technical term set and a general term set for each of i) a first language and ii) a second language, creating two bipartite graphs, where each graph corresponds to one of the two languages, and connects the technical term set and general term set of each language, respectively, with weighted links based on corpus information, creating a third bipartite graph by creating weighted links between general terms in the first language and general terms in the second language by using a translation dictionary, creating an association matrix M corresponding to the three bipartite graphs, calculating a similarity matrix Q by calculation of an inverse matrix, and outputting correspondence between the technical term sets of the first and second language on basis of the similarity matrix.

Abstract: An input/output (IO) circuit with high voltage tolerance is provided. In an integrated circuit, the IO circuit includes a charge pump for generating a bias voltage higher than an internal operating voltage of the charge pump itself, and a switch between an external circuit and an internal circuit of the integrated circuit. When the switch conducts between the external circuit and the internal circuit, the switch provides a clamping voltage according to the bias voltage and a cross voltage of the switch, so that a voltage of the internal circuit is bounded by the clamping voltage to prevent the internal circuit from over-voltage.