Abstract: Systems and methods for Analog-to-Digital Converter (ADC) auto-sequential scanning with expansion multiplexer(s) and auxiliary circuit configuration control(s). In some embodiments, an electronic circuit may include: a multiplexer; an Analog-to-Digital Converter (ADC) coupled to the multiplexer; and a control circuit coupled to the ADC and to the multiplexer, where the control circuit is configured to, as part of an auto-sequential scan, select one of a plurality of input channels coupled to the multiplexer via an expansion multiplexer.

Abstract: Disclosed is a method of operating a low power wireless receiver in which a radio is periodically operable for receive intervals with sleep intervals therebetween and comprising a sleep clock having a sleep clock accuracy. A first transmission or packet is received. Based on a start moment of the first received packet, and an expected interval between packets, a nominal start moment is determined to start the radio for a packet window until a nominal end moment, for receiving a second packet; the packet window duration is extended in dependence on an estimated drift based on the SCA to provide a widened window. A start moment of a second received packet is measured within the widened window. An actual drift is calculated, from the start moment of the second packet; and an actual start moment and an actual window duration is determined, for receiving a third packet, based on the actual drift.

Abstract: A system for providing an enhanced acknowledgement (ENH-ACK) frame is configured to receive an incoming packet transmitted by an external device, determine that an ENH-ACK response is required based on a MAC header of the incoming packet schedule transmission of the ENH-ACK frame to the external device in accordance with a standard turnaround time limit relative to receipt of the incoming packet, determine contents of one or more packet processed fields of the ENH-ACK frame and populate the one or more packet processed fields, and complete transmission of the ENH-ACK frame with the populated packet processed fields.

Abstract: Disclosed is a method of operating a low power wireless receiver in which a radio is periodically operable for receive intervals with sleep intervals therebetween and comprising a sleep clock having a sleep clock accuracy. A first transmission or packet is received. Based on a start moment of the first received packet, and an expected interval between packets, a nominal start moment is determined to start the radio for a packet window until a nominal end moment, for receiving a second packet; the packet window duration is extended in dependence on an estimated drift based on the SCA to provide a widened window. A start moment of a second received packet is measured within the widened window. An actual drift is calculated, from the start moment of the second packet; and an actual start moment and an actual window duration is determined, for receiving a third packet, based on the actual drift.

Abstract: A system for providing an enhanced acknowledgement (ENH-ACK) frame is configured to receive an incoming packet transmitted by an external device, determine that an ENH-ACK response is required based on a MAC header of the incoming packet schedule transmission of the ENH-ACK frame to the external device in accordance with a standard turnaround time limit relative to receipt of the incoming packet, determine contents of one or more packet processed fields of the ENH-ACK frame and populate the one or more packet processed fields, and complete transmission of the ENH-ACK frame with the populated packet processed fields.

Abstract: A system for reducing stress on a memory device that has multiple memory blocks. The system includes a counting unit for incrementing count values respectively associated with the memory blocks. Each of the count values indicates the number of times the associated memory block has been erased. A controller monitors the count values. Upon detecting that a count value associated with a first memory block reaches a predefined threshold, the controller selects a second memory block from the memory blocks to be swapped with the first memory block based on a count value associated with the second memory block.

Abstract: A system for reducing stress on a memory device that has multiple memory blocks. The system includes a counting unit for incrementing count values respectively associated with the memory blocks. Each of the count values indicates the number of times the associated memory block has been erased. A controller monitors the count values. Upon detecting that a count value associated with a first memory block reaches a predefined threshold, the controller selects a second memory block from the memory blocks to be swapped with the first memory block based on a count value associated with the second memory block.

Abstract: A non-volatile memory (NVM) system has a main NVM sector with multiple memory segments, a redundant NVM sector for storing recovery records, an address-matching circuit having multiple memory sections, each adapted to store a pair of main and substitute addresses, and an NVM controller. The NVM controller is configured to determine if a first memory segment of the main NVM sector is no longer usable and, consequently (i) create a recovery record for storage in the redundant NVM sector that includes the address of the first memory segment and the data associated with the first memory segment, and (ii) add a pair of main and substitute addresses to the address-matching circuit, where the main address is the address of the first memory segment and the substitute address identifies a substitute location for the data associated with the first memory segment.

Abstract: A non-volatile memory (NVM) system has a main NVM sector with multiple memory segments, a redundant NVM sector for storing recovery records, an address-matching circuit having multiple memory sections, each adapted to store a pair of main and substitute addresses, and an NVM controller. The NVM controller is configured to determine if a first memory segment of the main NVM sector is no longer usable and, consequently (i) create a recovery record for storage in the redundant NVM sector that includes the address of the first memory segment and the data associated with the first memory segment, and (ii) add a pair of main and substitute addresses to the address-matching circuit, where the main address is the address of the first memory segment and the substitute address identifies a substitute location for the data associated with the first memory segment.