Patents by Inventor Yao-Wei Chuang

Yao-Wei Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11424371
    Abstract: A multi-trench schottky diode includes a semiconductor base layer, a back metal layer, an epitaxial layer, an interlayer dielectric layer, a first metal layer, a passivation layer and a second metal layer. The epitaxial layer on the semiconductor base layer includes a termination trench structure, a first trench structure, a second trench structure and a third trench structure. The dielectric layer is on the epitaxial layer in a termination area. The first metal layer stacked on the termination trench structure and the interlayer dielectric layer extends between the second trench structure and the third trench structure. The passivation layer is on the first metal layer and the interlayer dielectric layer. The second metal layer on the first metal layer and the passivation layer extends to the first trench structure. Thus, the electric field is dispersed and the voltage breakdown can be avoided with the trench structures in the termination area.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: August 23, 2022
    Assignee: TAIWAN SEMICONDUCTOR CO., LTD.
    Inventors: Yi-Lung Tsai, Syed Sarwar Imam, Yao-Wei Chuang, Ming-Lou Tung
  • Publication number: 20210376169
    Abstract: A multi-trench schottky diode includes a semiconductor base layer, a back metal layer, an epitaxial layer, an interlayer dielectric layer, a first metal layer, a passivation layer and a second metal layer. The epitaxial layer on the semiconductor base layer includes a termination trench structure, a first trench structure, a second trench structure and a third trench structure. The dielectric layer is on the epitaxial layer in a termination area. The first metal layer stacked on the termination trench structure and the interlayer dielectric layer extends between the second trench structure and the third trench structure. The passivation layer is on the first metal layer and the interlayer dielectric layer. The second metal layer on the first metal layer and the passivation layer extends to the first trench structure. Thus, the electric field is dispersed and the voltage breakdown can be avoided with the trench structures in the termination area.
    Type: Application
    Filed: July 22, 2020
    Publication date: December 2, 2021
    Inventors: Yi-Lung TSAI, Syed Sarwar IMAM, Yao-Wei CHUANG, Ming-Lou TUNG
  • Publication number: 20210376062
    Abstract: A Schottky diode with multiple guard ring structures includes a semiconductor base layer, a back metal layer, an epitaxial layer, a dielectric layer, a first metal layer, a passivation layer and a second metal layer. The epitaxial layer on the semiconductor base layer includes a terminal trench structure, a first ion implantation guard ring, a second ion implantation guard ring and a third ion implantation guard ring. The dielectric layer is on the epitaxial layer in a termination area. The first metal layer is on the terminal trench structure and the dielectric layer. The passivation layer is on the first metal layer and the dielectric layer. The second metal layer is on the first metal layer and the passivation layer. Widths of the first, second and third ion implantation guard rings decrease in order, so that the voltage can be distributed step by step.
    Type: Application
    Filed: July 22, 2020
    Publication date: December 2, 2021
    Inventors: Yi-Lung TSAI, Syed Sarwar IMAM, Yao-Wei CHUANG, Ming-Lou TUNG
  • Patent number: 11177342
    Abstract: A Schottky diode with multiple guard ring structures includes a semiconductor base layer, a back metal layer, an epitaxial layer, a dielectric layer, a first metal layer, a passivation layer and a second metal layer. The epitaxial layer on the semiconductor base layer includes a terminal trench structure, a first ion implantation guard ring, a second ion implantation guard ring and a third ion implantation guard ring. The dielectric layer is on the epitaxial layer in a termination area. The first metal layer is on the terminal trench structure and the dielectric layer. The passivation layer is on the first metal layer and the dielectric layer. The second metal layer is on the first metal layer and the passivation layer. Widths of the first, second and third ion implantation guard rings decrease in order, so that the voltage can be distributed step by step.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: November 16, 2021
    Assignee: TAIWAN SEMICONDUCTOR CO., LTD.
    Inventors: Yi-Lung Tsai, Syed Sarwar Imam, Yao-Wei Chuang, Ming-Lou Tung