Abstract: The present application discloses a semiconductor device and a manufacturing method thereof. The manufacturing method comprises manufacturing a semiconductor material layer comprising two laminated semiconductor layers between which an etching transition layer is provided; and etching a part of one of semiconductor layers located in a selected region until etching is stopped after reaching or entering the etching transition layer, subjecting the part of the etching transition layer located in the selected region to thermal decomposition through thermal treatment to be completely removed, and realizing termination of thermal decomposition on another semiconductor layer, so as to precisely form a trench structure in the semiconductor material layer.

Abstract: A group III nitride enhancement-mode HEMT based on a composite barrier layer structure and a manufacturing method thereof are provided. The HEMT includes first and second semiconductors respectively serving as a channel layer and a barrier layer, a third semiconductor serving as a p-type layer, a source, a drain and a gate, wherein a recessed structure is formed in the region of the barrier layer corresponding to the gate, which is matched with the third semiconductor and the gate to form a p-type gate, and the second semiconductor includes first and second structure layers successively arranged on the first semiconductor; relative to the selected etching reagent, the first structure layer has higher etching resistance than the second structure layer.

Abstract: The present application discloses a semiconductor device and a manufacturing method thereof. The manufacturing method comprises manufacturing a semiconductor material layer comprising two laminated semiconductor layers between which an etching transition layer is provided; and etching a part of one of semiconductor layers located in a selected region until etching is stopped after reaching or entering the etching transition layer, subjecting the part of the etching transition layer located in the selected region to thermal decomposition through thermal treatment to be completely removed, and realizing termination of thermal decomposition on another semiconductor layer, so as to precisely form a trench structure in the semiconductor material layer.

Abstract: A group III nitride enhancement-mode HEMT based on a composite barrier layer structure and a manufacturing method thereof are provided. The HEMT includes first and second semiconductors respectively serving as a channel layer and a barrier layer, a third semiconductor serving as a p-type layer, a source, a drain and a gate, wherein a recessed structure is formed in the region of the barrier layer corresponding to the gate, which is matched with the third semiconductor and the gate to form a p-type gate, and the second semiconductor includes first and second structure layers successively arranged on the first semiconductor; relative to the selected etching reagent, the first structure layer has higher etching resistance than the second structure layer.