Patents by Inventor Yaqi Zhang

Yaqi Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250112234
    Abstract: The present application relates to the field of lithium-ion batteries and discloses a lithium-ion battery cathode material, a preparation method thereof, and a lithium-ion battery. A ratio of surface Ni3+ content of the cathode material to internal Ni3+ content of the cathode material is (0.95 to 1):1, and a content of disordering nickel in the cathode material is less than or equal to 3%. The lithium-ion battery cathode material has the similar surface Ni3+ content and internal Ni3+ content, and has a low content of disordering nickel, thereby avoiding the generation of a NiO passivation layer in the cathode material and reducing the phenomenon of loss of surface active lithium. The lithium-ion battery containing such a cathode material has improved capacity, rate capacity, and cycle performance.
    Type: Application
    Filed: December 9, 2024
    Publication date: April 3, 2025
    Inventors: Yun LIU, Jingpeng WANG, Yaqi WANG, Hang ZHANG, Xuequan ZHANG, Yafei LIU, Yanbin CHEN
  • Publication number: 20250103184
    Abstract: The present disclosure relates to an information presentation method and apparatus, an electronic device and a storage medium. The method includes: presenting a target page, wherein the target page includes an object detail presentation area and a candidate object set presentation area, and the candidate object set presentation area is used for presenting first abstract information of each candidate object in a candidate object set; and in response to a selection operation for one piece of first abstract information in the candidate object set presentation area, presenting detail information of a first target object in the object detail presentation area, wherein the first target object is a candidate object corresponding to the selected first abstract information. Therefore, the operation steps of browsing the detail information of different objects can be simplified, and the operation time consumption can be shortened.
    Type: Application
    Filed: September 25, 2024
    Publication date: March 27, 2025
    Inventors: Yongliang Luo, Man Zhou, Yuchen Wang, Jiayin Luo, Shidan Gui, Xiang Zhang, Chenyang Chang, Yaqi Li, Xiao Yang, Shiyi Li
  • Publication number: 20250084973
    Abstract: The present disclosure discloses a skate-bear-shaped projection lamp, and relates to the technical field of projection lamps. The skate-bear-shaped projection lamp includes a projection head portion; a lower body of the skate bear is movably connected to the projection head portion; a center column, a lower end of which is fixedly connected to an inner cavity of the lower body of the skate bear, is mounted in a center inside the projection head portion; an inner annular picture plate and an outer annular picture plate which are adjusted in any angle for combined projection surround an upper end of the center column in sequence from inside to outside; an inner ring plate and an outer ring plate which are capable of being adjusted in any angle are respectively fixed at upper ends of the inner annular picture plate and the outer annular picture plate.
    Type: Application
    Filed: October 30, 2024
    Publication date: March 13, 2025
    Inventor: Yaqi Zhang
  • Publication number: 20250072692
    Abstract: A cleaning method for a cleaning device includes: acquiring a grid map of a region to be cleaned; dividing a passable region in the grid map into a plurality of candidate regions; screening the plurality of candidate regions; prioritizing a plurality of screened candidate regions, and corresponding the plurality of screened candidate regions with different priorities to different cleaning parameters; and cleaning the plurality of screened candidate regions according to priority sorting, the cleaning parameters include at least one of a cleaning frequency, cleaning time, cleaning agent addition information and a cleaning mode. Adopting the cleaning method for the cleaning device effectively solves problems in that cleaning efficiency of a robot vacuum cleaner is relatively low in related technologies.
    Type: Application
    Filed: November 19, 2024
    Publication date: March 6, 2025
    Applicants: GREE ELECTRIC APPLIANCES, INC. OF ZHUHAI, LEAYUN TECHNOLOGY CO., LTD. OF ZHUHAI
    Inventors: Shaofeng GUO, Yanyu CHEN, Yaqi MA, Li ZHANG, Gao CHEN, Boyang GUO
  • Publication number: 20250053518
    Abstract: A system comprises an array of reconfigurable units including a plurality of pattern compute units (PCUs) and a plurality of pattern memory units (PMUs), and a compiler configured to receive a tensor including a plurality of memory access patterns of a first type (read) and a second type (write) located in a logical memory of the compiler. Each memory access pattern includes a memory access particular to that type. The compiler is configured to create a plurality of duplicates of the tensor and assign one or more contexts of any type to the duplicate tensors, such that no two contexts of the same type are in the same duplicate tensor. The compiler is configured to trim the duplicate tensors to retain portions including its corresponding assigned contexts remove portions that are inconsequential to the assigned contexts and dispatch the assigned contexts from each duplicate tensor to one or more PMUs.
    Type: Application
    Filed: November 29, 2023
    Publication date: February 13, 2025
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew FELDMAN, Yaqi ZHANG
  • Patent number: 12204534
    Abstract: A time series data injection method is provided, including: receiving time series data, where the time series data includes at least one parameter identifying a data source that generates the time series data, an indicator indicating at least one attribute of the data source, and a timestamp indicating a time point when the indicator is generated; storing a first parameter group in a row storage format, where the first parameter group includes the at least one parameter identifying the data source that generates the time series data; and storing a second parameter group in a columnar storage format, where the second parameter group includes the indicator indicating the at least one attribute of the data source and the timestamp. In the method, the time series data is injected in a hybrid row-column storage manner.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: January 21, 2025
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Minqi Zhou, Zhenghai Luo, Yong Zhang, Yaqi Zhao, Yujie Zou, Yuanhui Xu
  • Patent number: 12204489
    Abstract: A method for partitioning executable operations for a reconfigurable computing system includes receiving a set of expressions comprising a plurality of operations and dependencies for those operations, partitioning the plurality of operations into selected executable partitions wherein each selected executable partition conforms to resource constraints for a reconfigurable unit of the reconfigurable computing system. Partitioning the plurality of operations into selected executable partitions may include seeding a candidate partition with an operation, recursively generating an additional candidate partition for each operation adjacent to the candidate partition whose dependent operations are already within the candidate partition or a previously selected partition, and selecting a best candidate partition based on resource cost. A corresponding system and computer-readable medium are also disclosed herein.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: January 21, 2025
    Assignee: SambaNova Systems, Inc.
    Inventors: Yaqi Zhang, Mark Wagner, Matthew Feldman, Weiwei Chen
  • Patent number: 12200345
    Abstract: Disclosed are an image selection method and an electronic device. In the method, an electronic device can detect feedback information related to a user operation. The feedback information may include an optimal image selected by a decision model and a changed optimal image. The feedback information may further include images that are deleted, browsed, added-to-favorites, or shared and operation records. The feedback information may further include a facial feature in a gallery and a proportion of images including the facial feature in the gallery. The electronic device adjusts, according to the feedback information, parameters of the decision model configured to perform image selection, to obtain an updated decision model. The electronic device can perform image selection according to the updated decision model. Through the implementation of the technical solution, a selected optimal image is more in line with user habits, thereby improving convenience.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: January 14, 2025
    Assignee: HONOR DEVICE CO., LTD.
    Inventors: Yanhua Chen, Hongma Liu, Yaqi Zhang, Chao Zhang
  • Publication number: 20250013375
    Abstract: A system and method for memory unit partitioning for reconfigurable dataflow computing systems includes a parser that receives and parses source code for a reconfigurable dataflow processor, a tensor expression extractor that extracts tensor indexing expressions from the source code, a logical memory constraint generator that converts the tensor indexing expressions to logical memory indexing constraints, a grouping module that groups the logical memory indexing constraints into concurrent access groups, and a memory partitioning module that determines a memory unit partitioning solution for each concurrent access group.
    Type: Application
    Filed: September 17, 2024
    Publication date: January 9, 2025
    Applicant: SambaNova Systems, Inc.
    Inventors: Yaqi ZHANG, Matthew FELDMAN
  • Patent number: 12101114
    Abstract: The present invention discloses is a multi-band hyperbolic frequency modulation spread spectrum communication method based on cross sub-band division. In the present solution, multi-band division of different sub-band quantities is performed on an available bandwidth of an underwater acoustic system according to the parity of the serial number of the current spread spectrum period to achieve the aim of cross sub-band division. On this basis, a plurality of divided sub-bands are grouped in pairs; for each group, sub-band selection is performed according to different transmitted data by using a sub-band selection and activation method to realize multi-band parallel transmission. Meanwhile, in each spread spectrum period, an activated sub-band performs frequency modulation on a modulated signal by using rising and falling hyperbolic frequency modulation signals respectively.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: September 24, 2024
    Assignee: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Hua Yu, Yaqi Zhang, Fei Ji, Fangjiong Chen
  • Patent number: 12093551
    Abstract: A system includes a reconfigurable dataflow processor that comprises an array of compute units and an array of memory units interconnected with a switching fabric. The reconfigurable dataflow processor can be configured to execute a plurality of tensor indexing expressions and access the array of memory units according to a memory unit partitioning solution.
    Type: Grant
    Filed: June 12, 2023
    Date of Patent: September 17, 2024
    Assignee: SambaNova Systems, Inc.
    Inventors: Matthew Feldman, Yaqi Zhang
  • Publication number: 20240241844
    Abstract: A method and system for integrating buffer views into buffer access operations in reconfigurable computing environments. The method includes detecting, in a buffer allocation statement comprising a tensor indexing expression, a buffer view indicator and one or more buffer view parameters. The buffer view parameters are lowered into the tensor indexing expression, according to the buffer view indicator, to produce a modified tensor indexing expression. The buffer view indicator is removed from a buffer allocation statement to produce a modified buffer allocation statement and allocating a buffer according to the modified buffer allocation statement. The system implements the described method and further includes a non-transitory computer readable medium for executing the disclosed method.
    Type: Application
    Filed: April 1, 2024
    Publication date: July 18, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Yaqi ZHANG, Matthew FELDMAN
  • Publication number: 20240232128
    Abstract: A statically reconfigurable dataflow architecture processor performs an N-dimensional affine transform specified by a matrix on an input image to produce an output image includes at least N+1 statically reconfigurable pattern compute units (PCUs) and pattern memory units (PMUs) each comprising a memory arranged as a vector of L banks. A first PMU writes a copy of the input image into each of the L banks. Each of N of the PCUs associated with the N dimensions is statically reconfigurable to apply a respective row of the transform matrix to N L-vectors of output pixel coordinates to generate a respective L-vector of input pixel coordinates. At least one of the PCUs flattens the N L-vectors of input pixel coordinates to calculate an L-vector of addresses. The first PMU uses the L addresses of the L-vector of addresses to read an L-vector of input pixels from the L banks in parallel.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 11, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew Vilim, Raghu Prabhakar, Matt Feldman, Yaqi Zhang
  • Publication number: 20240233069
    Abstract: A statically reconfigurable dataflow architecture processor (SRDAP) performs an N-dimensional affine transform specified by a matrix on an input image to produce an output image includes L address pattern memory units (PMUs) comprising a memory arranged as a vector of L banks, and L corresponding data PMUs. Each data PMU receives a copy of the input image. In parallel: each address PMU writes an L-vector of addresses of input pixels to the vector of L banks and reads a single address of the written L-vector of addresses from a predetermined bank corresponding to a PMU number of the address PMU among the L address PMUs, and each data PMU receives the single address from the corresponding address PMU and uses it to read a single input pixel from the data PMU memory. A tree of pattern compute units coalesces the L single input pixels into an L-vector of input pixels.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 11, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew Vilim, Raghu Prabhakar, Matt Feldman, Yaqi Zhang
  • Publication number: 20240233068
    Abstract: A statically reconfigurable dataflow architecture processor (SRDAP) performs an N-dimensional affine transform specified by a matrix on an input image to produce an output image includes pattern compute units (PCUs) and pattern memory units (PMUs) interconnected by switches. PCUs have vector pipelines of functional units that perform operations on operands received from previous pipeline stages, another PCU, and/or PMUs. PMUs have memories loadable with the input image. The PCUs and PMUs are statically reconfigurable to, for all the output pixels: apply the matrix to vectors of output pixel coordinates to calculate corresponding vectors of input pixel coordinates, flatten the vectors of input pixel coordinates into vectors of PMU addresses of the input pixels, read values of the input pixels from the PMUs at the calculated input pixel addresses, and write vectors of the input pixel values to PMUs to form the output image.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 11, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew Vilim, Raghu Prabhakar, Matt Feldman, Yaqi Zhang
  • Publication number: 20240232127
    Abstract: A statically reconfigurable dataflow architecture processor performs an N-dimensional affine transform specified by a matrix on an input image to produce an output image. N counters iterate over the output image by N respective stride values (N output tile dimension lengths) to generate base pixel coordinates of N-dimensional output tiles into which the output image is subdividable. Statically reconfigurable pattern compute units, for each output tile of the output tiles: use the base pixel coordinates of the output tile and the N output tile dimension lengths to calculate the coordinates of corner pixels of the output tile and apply the affine transform matrix to the corner pixel coordinates and use the results to determine base pixel coordinates of a corresponding N-dimensional input tile into which the input image is subdividable. Statically reconfigurable pattern memory units load each corresponding input tile based on the determined input tile base pixel coordinates.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 11, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew Vilim, Raghu Prabhakar, Matt Feldman, Yaqi Zhang
  • Patent number: 11954053
    Abstract: A method for integrating buffer views into buffer access operations in a reconfigurable computing environment includes detecting, in an instruction stream for a reconfigurable dataflow unit (RDU), a buffer allocation statement comprising a tensor indexing expression, a buffer view indicator and one or more buffer view parameters. The method also includes lowering the buffer view parameters into the indexing expression according to the buffer view indicator to produce a modified tensor indexing expression, removing the buffer view indicator from the buffer allocation statement to produce a modified buffer allocation statement and allocating a buffer according to the modified buffer allocation statement. The modified buffer allocation statement may include the modified tensor indexing expression. A corresponding system and computer readable medium are also disclosed herein.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: April 9, 2024
    Assignee: SambaNova Systems, Inc.
    Inventors: Yaqi Zhang, Matthew Feldman
  • Publication number: 20240062392
    Abstract: An electronic device obtains N frames of images, and then obtains a first operation performed by a user on a target object on a screen. The electronic device displays a target box whose area cyclically changes, obtains information about the target box in an Nth frame of image based on a second operation performed by the user on the target object, and determines a feature vector of the target object based on the information about the target box.
    Type: Application
    Filed: December 17, 2021
    Publication date: February 22, 2024
    Inventors: Chao Zhang, Jian Xu, Yaqi Zhang, Hongma Liu, Zhiping Jia, Shuailin Lv
  • Publication number: 20230350822
    Abstract: A method for integrating buffer views into buffer access operations in a reconfigurable computing environment includes detecting, in an instruction stream for a reconfigurable dataflow unit (RDU), a buffer allocation statement comprising a tensor indexing expression, a buffer view indicator and one or more buffer view parameters. The method also includes lowering the buffer view parameters into the indexing expression according to the buffer view indicator to produce a modified tensor indexing expression, removing the buffer view indicator from the buffer allocation statement to produce a modified buffer allocation statement and allocating a buffer according to the modified buffer allocation statement. The modified buffer allocation statement may include the modified tensor indexing expression. A corresponding system and computer readable medium are also disclosed herein.
    Type: Application
    Filed: October 13, 2022
    Publication date: November 2, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Yaqi ZHANG, Matthew FELDMAN
  • Publication number: 20230315322
    Abstract: A system includes a reconfigurable dataflow processor that comprises an array of compute units and an array of memory units interconnected with a switching fabric. The reconfigurable dataflow processor can be configured to execute a plurality of tensor indexing expressions and access the array of memory units according to a memory unit partitioning solution.
    Type: Application
    Filed: June 12, 2023
    Publication date: October 5, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Matthew FELDMAN, Yaqi ZHANG