Patents by Inventor Yaqin Wang

Yaqin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240098973
    Abstract: A semiconductor device, a memory system, and a fabricating method are provided. The semiconductor device comprises a memory structure bonded with a circuit structure. The memory structure comprises: first transistors each comprising a semiconductor body extending in a vertical direction, a semiconductor layer on a lateral side of the first transistors, a first isolation structure extending through the semiconductor layer and laterally encircling a first portion of the semiconductor layer, a first contact structure extending through the first portion of the semiconductor layer, and a first contact pad above the first portion of the semiconductor layer and connected with the first contact structure. A lateral dimension of the first contact pad is less than a lateral dimension of the first portion of the semiconductor layer. The circuit structure comprises a second transistor, and the first contact pad is electrically connected to the second transistor by the first contact structure.
    Type: Application
    Filed: August 8, 2023
    Publication date: March 21, 2024
    Inventors: Yaqin Liu, Wei Liu, Yanhong Wang, Shiqi Huang, Zichen Liu
  • Publication number: 20230411252
    Abstract: The present invention provides a manufacturing method of a semiconductor packaging member, a semiconductor packaging member and a mounting method thereof. The manufacturing method includes the following steps of: pre-molding packaging a lead frame, forming a pre-molding package body both between a lead and a base, and between two adjacent leads in each lead frame unit; forming a groove by thinning an outer lead from a front surface of the outer lead; forming a tin block in the groove; mounting a chip on the base island; plastic-packaging the lead frame which has completed the wire-bonded; forming a semifinished product by forming a tin-plated layer in an exposed region of a back surface of the plastic-packaged lead frame; and forming a single semiconductor packaging member by cutting the semifinished product, the tin block in the semiconductor packaging member is exposed away from the base island.
    Type: Application
    Filed: January 21, 2023
    Publication date: December 21, 2023
    Inventors: KAI LIU, YAQIN WANG
  • Publication number: 20220400922
    Abstract: A wand includes a hinge configured to pivotally connect first and second wand segments in an extended configuration and a storage configuration. A first locking mechanism locks the wand in extended configuration. A second locking mechanism includes a rod, a sliding lever, a plunger, and a plunger cavity. The plunger is configured to be received in the plunger cavity to lock the wand in the storage configuration. When in the extended configuration, depressing a single actuator pivots the locking arm, causes the hook/pawl to be removed from the locking cavity, and unlocks the wand. When in the storage configuration, depressing the single actuator causes the rod to move in a first direction, causes the sliding rod to move a second direction, and urges the plunger out of the plunger cavity.
    Type: Application
    Filed: June 17, 2022
    Publication date: December 22, 2022
    Inventors: Casey MCCLAY, Kevin KELEMEN, Owen R. JOHNSON, Steven GACIN, Patrick CLEARY, AiMing XU, Dawei ZHAO, Yaqin WANG, Weiwei HE
  • Patent number: 9640413
    Abstract: Provided is an etching-before-packaging horizontal chip three-dimensional system level metal circuit board structure comprising a metal substrate frame; the metal substrate frame is provided with base islands and pins therein; the front faces of the base islands are provided with chips; the front faces of the chips are connected to the front faces of the pins via metal wires; conductive posts are disposed on the front faces or back faces of the pins; the peripheral areas of the base islands, the areas between the base islands and the pins, the areas between the pins, the areas above the base islands and the pins, the areas below the base islands and the pins, and the exteriors of the chips, the metal wires and the conductive posts are all encapsulated with molding compound.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: May 2, 2017
    Assignee: Jiangsu Changjiang Electronics Technology Co., Ltd
    Inventors: Steve Xin Liang, Chih-Chung Liang, Yu-Bin Lin, Yaqin Wang, Youhai Zhang
  • Patent number: 9633985
    Abstract: A first-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and a processing method for manufacturing the same are provided. The structure includes: a die pad (1); a lead (2); a chip (4) provided on a top surface of the die pad (1) by a conductive or non-conductive adhesive material (3); a metal wire (5) via which a top surface of the chip (4) is connected to a top surface of the lead (2); a conductive pillar (6) provided on the surface of the lead (2); and a molding material (7).
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: April 25, 2017
    Assignee: Jiangsu Changjiang Electronics Technology Co., Ltd
    Inventors: Chih-Chung Liang, Yaqin Wang, Chunyan Zhang, Yu-Bin Lin, Youhai Zhang
  • Patent number: 9627303
    Abstract: Provided is an etching-before-packaging three-dimensional system-level metal circuit board structure inversely provided with a chip. The structure comprises a metal substrate frame, wherein a base island and pins are arranged in the metal substrate frame; a chip is inversely arranged on a front face of the base island and the pins; a conductive pillar is arranged on a front face of the pins; the region on the periphery of the base island, the region between the base island and the pins, the region between one pin and another, the region above the base island and the pins, the region below the base island and the pins, and the outside of the chip and the conductive pillar are all enveloped with a plastic packaging material.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: April 18, 2017
    Assignee: Jiangsu Changjiang Electronics Technology Co., Ltd
    Inventors: Youhai Zhang, Kai Zhang, Xiaojing Liao, Yaqin Wang, Sunyan Wang
  • Publication number: 20160372450
    Abstract: A first-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and a processing method for manufacturing the same are provided. The structure includes: a die pad (1); a lead (2); a chip (4) provided on a top surface of the die pad (1) by a conductive or non-conductive adhesive material (3); a metal wire (5) via which a top surface of the chip (4) is connected to a top surface of the lead (2); a conductive pillar (6) provided on the surface of the lead (2); and a molding material (7).
    Type: Application
    Filed: January 8, 2014
    Publication date: December 22, 2016
    Inventors: Chih-Chung Liang, Yaqin Wang, Chunyan Zhang, Yu-Bin Lin, Youhai Zhang
  • Publication number: 20160372338
    Abstract: Provided is an etching-before-packaging horizontal chip three-dimensional system level metal circuit board structure comprising a metal substrate frame; the metal substrate frame is provided with base islands and pins therein; the front faces of the base islands are provided with chips; the front faces of the chips are connected to the front faces of the pins via metal wires; conductive posts are disposed on the front faces or back faces of the pins; the peripheral areas of the base islands, the areas between the base islands and the pins, the areas between the pins, the areas above the base islands and the pins, the areas below the base islands and the pins, and the exteriors of the chips, the metal wires and the conductive posts are all encapsulated with molding compound.
    Type: Application
    Filed: December 2, 2013
    Publication date: December 22, 2016
    Inventors: Steve Xin Liang, Chih-Chung Liang, Yu-Bin Lin, Yaqin Wang, Youhai Zhang
  • Publication number: 20160351482
    Abstract: Provided is an etching-before-packaging three-dimensional system-level metal circuit board structure inversely provided with a chip. The structure comprises a metal substrate frame, wherein a base island and pins are arranged in the metal substrate frame; a chip is inversely arranged on a front face of the base island and the pins; a conductive pillar is arranged on a front face of the pins; the region on the periphery of the base island, the region between the base island and the pins, the region between one pin and another, the region above the base island and the pins, the region below the base island and the pins, and the outside of the chip and the conductive pillar are all enveloped with a plastic packaging material.
    Type: Application
    Filed: December 2, 2013
    Publication date: December 1, 2016
    Inventors: Youhai Zhang, Kai Zhang, Xiaojing Liao, Yaqin Wang, Sunyan Wang
  • Publication number: 20160163622
    Abstract: Provided are a packaging-before-etching flip chip 3D system-level metal circuit board structure and technique thereof. The metal circuit board structure comprises a metal substrate frame; the front face of the metal substrate frame is provided with pins; the front faces of the pins are provided with conductive posts; chips are installed in a flip manner between the pins via underfills; the peripheral areas of the pins, the conductive posts and the chip are encapsulated with molding compound, the top of the molding compound being parallel to the tops of the conductive posts; and the surfaces of the metal substrate frame, the pins and the conductive posts exposing out of the molding compounds are provided with an anti-oxidation layer, thus solving the problem of limited functionality and application of a traditional metal lead frame due to the fact that objects cannot be embedded therein.
    Type: Application
    Filed: December 3, 2013
    Publication date: June 9, 2016
    Inventors: Steve Xin Liang, Chih-Chung Lilang, Yu-Bin Lin, Yaqin Wang, Youhai Zhang
  • Publication number: 20160141233
    Abstract: The present invention relates to a first-packaged and later-etched normal chip three dimension-on-chip metal circuit board structure and a processing method for manufacturing the same, the structure includes: metal substrate frame (1); a lead (3) provided in the metal substrate frame (1); a conductive pillar (4) provided in a top surface of the lead (3); a chip is mounted normally on a top surface of the metal circuit frame (1) or between the leads (3); a metal wire (6) via which a top surface of the chip (5) is connected to a top surface of the lead (3); a molding material (8) with which a periphery region of the lead (3), the conductive pillar (4), the chip (5) and the metal wire (6) is encapsulated, with the molding material (8) being flushed with a top of the conductive pillar (4).
    Type: Application
    Filed: January 7, 2014
    Publication date: May 19, 2016
    Inventors: Steve Xin Liang, Chih-Chung Liang, Yu-Bin Lin, Yaqin Wang, Youhai Zhang