Abstract: A method for merging binary translated basic blocks of instructions. The method is for use in a computer system having in a memory a first set of instructions including blocks of instructions, and a translator for translating instructions executable on a source instruction set architecture into instructions executable on a target instruction set architecture. The method includes a first step of determining, by the translator, an order of execution from a first block of instructions to a second block of instructions. A second step of the method includes generating, by the translator, a hyperblock of instructions representing the first and second block of instructions translated and placed adjacent in a memory location in the order of execution.

Abstract: A method for increasing the performance of binary translated conditional instructions. According to one embodiment of the invention, a conditional instruction compatible with the first ISA is decoded. The condition of the conditional instruction is dependent on at least on status flag. The conditional instruction is translated to be compatible with a second ISA, wherein the condition of the conditional instruction is altered to be dependent on a previously computed difference between two values, the difference residing in a memory location.

Abstract: A method for enabling a first block of instructions to verify whether the first block of instructions follows a second block of instructions in an order of execution. The method includes appending a compare instruction to the first block of instructions. The compare instruction compares a first value from the first block of instructions with a second value from the second block of instructions, which precedes the first block of instructions in the order of execution. The method further includes appending a branching instruction to the first block of instructions. The branching instruction is executed in response to the first value being unequal to the second value. The branching instruction, when executed, branches to an alternative look-up routine to obtain a block of instructions that follows the second block of instructions in the order of execution.