Abstract: An apparatus for executing a software program, comprising at least one hardware processor configured for: identifying in a plurality of computer instructions at least one remote memory access instruction and a following instruction following the at least one remote memory access instruction; executing after the at least one remote memory access instruction a sequence of other instructions, where the sequence of other instructions comprises a return instruction to execute the following instruction; and executing the following instruction; wherein executing the sequence of other instructions comprises executing an updated plurality of computer instructions produced by at least one of: inserting into the plurality of computer instructions the sequence of other instructions or at least one flow-control instruction to execute the sequence of other instructions; and replacing the at least one remote memory access instruction with at least one non-blocking memory access instruction.

Abstract: In an example, a method is disclosed of folding each group of neighbor pixels (memory bins) of activations into a same pixel memory bin or a group of 3*3 neighboring pixels memory bins that are all accessible from a middle point processing unit to localize and standardize different convolution operations that are required or other operations such as max pooling or average pooling. The method includes folding together neighboring pixel activations. The method includes storing all the folded activations at the same pixel memory bin so that a local processing unit is able to access all required activations by accessing local memory or 3*3 neighboring pixel memory bins only.

Abstract: In an example, a method of pairing and adding together pairs of activations that need to be multiplied by the same weight includes identifying pairs of activations to be multiplied by a corresponding common weight. The method includes adding together activations in each pair of activations to be multiplied by the corresponding common weight to generate a corresponding summed activation. The method includes multiplying the corresponding summed activation by the corresponding common weight.

Abstract: In an example, a method of activation sparsity removal includes implementing a non-zero Activation jump algorithm. Alternatively, the method includes using multiple first in first out (FIFO) memories to store non-zero activations for each vector multiplication.

Abstract: In an example, a method of removing redundancy of multiplications of a same weight with different activations before adding all multiplication results together includes adding all activations that need to be multiplied with a common weight to generate a sum of activations. The method includes multiplying the sum of activations with the common weight.

Abstract: In an example, a method of reducing scalable deep neural networks (DNN) accelerator (sDNA) power consumption and silicon area includes generating a list of addresses in activation memory matrixes (AMM). Each address in the list of addresses points to an activations row that needs to be multiplied by a given non-zero weight for different vector multiplication calculations. The method includes storing in the AMM rows of activations, each row of activations including corresponding activations to be multiplied with a same non-zero weight. The method includes implementing vector multiplication on the rows of activations and non-zero weights, including removing weight sparsity from the AMM.

Abstract: In an example, a scalable deep neural networks (DNN) accelerator (sDNA) includes multiple address generators, an activation memory matrix (AMM), and multiple network processing units (NPUs). The AMM is coupled to outputs of the address generators. The NPUs are coupled to outputs of the AMM. Each NPU includes one of: an activation sparsity removal (ASR) block coupled to the AMM; a redundancy removal (RR) block coupled to the AMM; or both an ASR block coupled to the AMM and an RR block coupled to an output of the ASR block. Each NPU additionally includes a multiply accumulator (MAC) block coupled to the output of the ASR block or an output of the RR block and a non-linear unit coupled to an output of the MAC block.

Abstract: A centralized clock distribution mechanism for synchronous TDM communications traffic transported over asynchronous networks such as Ethernet networks. The centralized clocking mechanism of the present invention distributes a high accuracy central clock source to a plurality of CES modules over an Ethernet network. Clock synchronization information based on a high quality clock reference source is distributed to circuit emulation service (CES) modules in the network. CES modules receive the clock synchronization information and use it to reconstruct a local clock. A plurality of clock distributors provide clock redundancy whereby each CES module selects the best clock source to use in reconstructing the local clock.

Abstract: An apparatus for and method of enforcing precedence of committed traffic over excess traffic that overcomes the difficulty in supporting committed over excess traffic and has particular application to distributed queuing systems. Queue control messages are generated and transmitted to other line cards to guarantee that committed traffic is not dropped when sent from multiple sources such as line interface cards to a single destination. When the level of a queue exceeds a threshold and flow control is received for the corresponding destination, the queue starts dropping excess traffic and messages indicating the queue status are sent to all other lines cards. When a line card receives a queue control message that another line card started dropping excess traffic to a specific destination, it also starts dropping excess traffic to that destination as well.

Abstract: A subport forwarding and provisioning mechanism whereby a plurality of subports implemented using slower speed processors are used to perform the packet processing for a higher speed packet stream. Outbound packets are assigned a subport based on their MPLS labels. Once assigned, the packets are forwarded to a particular subport. The output of all the subports is aggregated and combined into a single high speed packet stream and transmitted over the link. Inbound packets are received by the high speed PHY and forwarded to one of a plurality of subports. The subport chosen is the one having the same subport index as the one through which the packet was sent out over at the transmitting node. Conventional layer 2 switches can also be used whereby reserved source MAC addresses are assigned to subports. The switch forwards the inbound packets to one of the subports in accordance with the packet's source MAC address.

Abstract: A protection mechanism capable of providing both local and end-to-end connection protection for dual homed access/aggregation devices or customer-edge devices in a network. The protection mechanism provides end-to-end and fast local protection for off the shelf access devices that do not have any built in per-connection protection capabilities. The access device is connected via two separate physical uplinks to two edge switches of the network. For each connection to be protected, a main path is provisioned from one edge switch and an alternative path is provisioned from the other edge switch. The edge switches are adapted to comprise means for switching traffic from the main path to the alternative path in the event a failure along the main path is detected. Failures both in the stack portion, the core portion and in the access device uplinks are protected against.

Abstract: An end-to-end monitoring mechanism whereby edge nodes are notified that a particular path flows through a local protection tunnel along the way. The notification mechanism utilizes OAM packets which include a link protection indication that are transmitted on the Ethernet service layer. The link protection indication may be represented by one or more flags to indicate that local protection is in place along the path. The mechanism enables fast local protection to be used with slower end-to-end protection by informing the latter when local protection is activated. In an implementation in which local-protection does not preserve the CIR of the protected traffic, the invention provides minimal interruption of Committed Information Rate (CIR) connections by minimizing the time traffic is diverted through local protection tunnels. Notification of the edge node that local protection is in use occurs very quickly, thus allowing the edge node to rapidly switch to a backup path.

Abstract: A fast protection mechanism capable of maintaining end-to-end and fast local protection on the order of sub 50 ms for both VLAN only based connections and for connections that are based partially on VLAN technology and partially on MPLS technology. The present invention is suitable for use edge switches configured in a stack or ring topology. The NMS provisions both the main and alternative VLANs in each edge switch in the stack portions of the network. When a link failure occurs, the edge switches on either end of the failed link immediately switch all protected traffic going through that link to the alternative VLAN. The packets are then returned on the links over which they were received. Hello messages are used to signal the remote end that a link failure has occurred and that protected traffic must be switched to the main or alternative VLAN in accordance with the VLAN the Hello message was received on.

Abstract: An apparatus for and method of enforcing precedence of committed traffic over excess traffic that overcomes the difficulty in supporting committed over excess traffic and has particular application to distributed queuing systems. Queue control messages are generated and transmitted to other line cards to guarantee that committed traffic is not dropped when sent from multiple sources such as line interface cards to a single destination. When the level of a queue exceeds a threshold and flow control is received for the corresponding destination, the queue starts dropping excess traffic and messages indicating the queue status are sent to all other lines cards. When a line card receives a queue control message that another line card started dropping excess traffic to a specific destination, it also starts dropping excess traffic to that destination as well.

Abstract: A path reroute mechanism for use in communication networks comprising multiple searches for a routing path to restore traffic following a failure that could not be protected by a previously established protection route (i.e. protection tunnel, bypass, etc.) or for routing or rerouting of traffic paths for optimization or any other purpose. Each node advertises TLVs that include bandwidth allocation information used to derive the actual amount of bandwidth available for protection purposes, protected paths and unprotected paths or a portion of this information such as in the case where unprotected paths are not supported. Searches are performed on larger and larger portions of the available bandwidth until a route for the path is found.