Patents by Inventor Yaron Shachar

Yaron Shachar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240070095
    Abstract: Systems and methods for data transmission power optimization are disclosed. In one aspect, the system consolidates signals from multiple narrowband channels in a radio frequency (RF) integrated circuit (IC) (RFIC) into a single shared buffer and evenly distributes packets based on the signals across lanes in a communication bus to a modem circuit. Such even utilization of the lanes of the bus allows for idle periods to occur on the bus, during which a low power or sleep state may be used to reduce power consumption.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Inventors: Tomer Shoshani, Albert Yosher, Yaron Shachar
  • Patent number: 9996489
    Abstract: The invention relates to a memory aggregation device for storing a set of input data streams and retrieving data to a set of output data streams, the memory aggregation device comprising: a set of first-in first-out (FIFO) memories each comprising an input and an output; an input interconnector configured to interconnect each one of the set of input data streams to each input of the set of FIFO memories according to an input interconnection matrix; an output interconnector configured to interconnect each output of the set of FIFO memories to each one of the set of output data streams according to an output interconnection matrix; an input selector; an output selector; and a memory controller.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: June 12, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yaron Shachar, Yoav Peleg, Alex Tal, Alex Umansky, Rami Zemach, Lixia Xiong, Yuchun Lu
  • Publication number: 20160164807
    Abstract: The present invention provides an improved platform hub that aims to, in some embodiments, optimize system resources to improve system performance and/or reduce consumption of power.
    Type: Application
    Filed: February 16, 2016
    Publication date: June 9, 2016
    Applicant: Commex Technologies, Ltd.
    Inventors: Yehiel ENGEL, Avraham GANOR, Tal HOROWITZ, Michael Chaim SCHNARCH, Yaron SHACHAR, Uri Chanan WEISER
  • Publication number: 20160103710
    Abstract: The invention relates to a scheduling device for receiving a set of requests and providing a set of grants to the set of requests, the scheduling device comprising: a lookup vector prepare unit configured to provide a lookup vector prepared set of requests depending on the set of requests and a selection mask and to provide a set of acknowledgements to the set of requests; and a prefix forest unit coupled to the lookup vector prepare unit, wherein the prefix forest unit is configured to provide the set of grants as a function of the lookup vector prepared set of requests and to provide the selection mask based on the set of grants.
    Type: Application
    Filed: December 18, 2015
    Publication date: April 14, 2016
    Inventors: Yaron Shachar, Yoav Peleg, Alex Tal, Lixia Xiong, Yuchun Lu, Alex Umansky
  • Publication number: 20160103777
    Abstract: The invention relates to a memory aggregation device for storing a set of input data streams and retrieving data to a set of output data streams, the memory aggregation device comprising: a set of first-in first-out (FIFO) memories each comprising an input and an output; an input interconnector configured to interconnect each one of the set of input data streams to each input of the set of FIFO memories according to an input interconnection matrix; an output interconnector configured to interconnect each output of the set of FIFO memories to each one of the set of output data streams according to an output interconnection matrix; an input selector; an output selector; and a memory controller.
    Type: Application
    Filed: December 18, 2015
    Publication date: April 14, 2016
    Inventors: Yaron Shachar, Yoav Peleg, Alex Tal, Alex Umansky, Rami Zemach, Lixia Xiong, Yuchun Lu
  • Patent number: 9281053
    Abstract: A memory system (1) comprising a control logic (2) adapted to receive a number n of write requests (WRs) from input ports and to receive a read request (RR) from an output port within a clock cycle of a clock signal (CLK) applied to said memory system (1), wherein n is a natural number; and n+1 memory banks (4) of a shared memory (3) adapted to store data, wherein the control logic (2) is adapted to control a memory bank occupancy level MBOL of each memory bank (4) such that the differences between memory bank occupancy levels MBOLs of the memory banks (4) are minimized.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: March 8, 2016
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Rami Zecharia, Yaron Shachar
  • Patent number: 9268729
    Abstract: The present invention provides an improved platform hub that aims to, in some embodiments, optimize system resources to improve system performance and/or reduce consumption of power.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: February 23, 2016
    Assignee: Commex Technologies, Ltd.
    Inventors: Yehiel Engel, Avraham Ganor, Tal Horowitz, Michael Chaim Schnarch, Yaron Shachar, Uri Chanan Weiser
  • Publication number: 20140185368
    Abstract: A memory system (1) comprising a control logic (2) adapted to receive a number n of write requests (WRs) from input ports and to receive a read request (RR) from an output port within a clock cycle of a clock signal (CLK) applied to said memory system (1), wherein n is a natural number; and n+1 memory banks (4) of a shared memory (3) adapted to store data, wherein the control logic (2) is adapted to control a memory bank occupancy level MBOL of each memory bank (4) such that the differences between memory bank occupancy levels MBOLs of the memory banks (4) are minimized
    Type: Application
    Filed: March 5, 2014
    Publication date: July 3, 2014
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Rami ZECHARIA, Yaron SHACHAR
  • Publication number: 20130016729
    Abstract: The present invention provides an improved platform hub that aims to, in some embodiments, optimize system resources to improve system performance and/or reduce consumption of power.
    Type: Application
    Filed: May 18, 2012
    Publication date: January 17, 2013
    Applicant: Commex Technologies, Ltd.
    Inventors: Yehiel Engel, Avraham Ganor, Tal Horowitz, Michael Chaim Schnarch, Yaron Shachar, Uri Chanan Weiser
  • Patent number: 8209457
    Abstract: The present invention provides an improved platform hub that aims to, in some embodiments, optimize system resources to improve system performance and/or reduce consumption of power.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: June 26, 2012
    Assignee: Commex Technologies, Ltd.
    Inventors: Yehiel Engel, Avraham Ganor, Tal Horowitz, Michael Chaim Schnarch, Yaron Shachar, Uri Chanan Weiser
  • Publication number: 20100332713
    Abstract: The present invention provides an improved platform hub that aims to, in some embodiments, optimize system resources to improve system performance and/or reduce consumption of power.
    Type: Application
    Filed: September 3, 2010
    Publication date: December 30, 2010
    Applicant: Commex Technologies, Ltd.
    Inventors: Yehiel Engel, Avraham Ganor, Tal Horowitz, Michael Chaim Schnarch, Yaron Shachar, Uri Chanan Weiser
  • Patent number: 7793032
    Abstract: The present invention provides an improved platform hub that aims to, in some embodiments, optimize system resources to improve system performance and/or reduce consumption of power.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: September 7, 2010
    Assignee: Commex Technologies, Ltd.
    Inventors: Yehiel Engel, Avraham Ganor, Tal Horowitz, Michael Chaim Schnarch, Yaron Shachar, Uri Chanan Weiser