Patents by Inventor Yarui ZHENG
Yarui ZHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11917927Abstract: A production line device prepares a superconducting circuit layer on a substrate. The device prepares an under bump metallization (UBM) layer on an upper surface of the superconducting circuit layer. A superconducting connection is formed between the UBM layer and the superconducting circuit layer. The production device prepares a welding spot on an upper surface of the UBM layer to obtain a qubit assembly configured for a flip-chip superconducting quantum chip. A superconducting electrical connection is formed between the welding spot and the UBM layer.Type: GrantFiled: October 24, 2022Date of Patent: February 27, 2024Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Chenji Zou, Yarui Zheng, Hui Wang
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Patent number: 11869861Abstract: This disclosure discloses a method for preparing an indium pillar, a chip substrate and a chip. The method includes: applying a first photoresist layer on a substrate; applying a second photoresist layer on the first photoresist layer; covering a part of a surface of the second photoresist layer; underexposing the part of the second photoresist layer to obtain a processed second photoresist layer; developing and fixing the processed second photoresist layer to form an undercut structure; etching the first photoresist layer through the undercut structure to form an expose area; and depositing an indium material on the exposed area to form an indium pillar solder.Type: GrantFiled: January 10, 2022Date of Patent: January 9, 2024Assignee: Tencent Technology (Shenzhen) Company LimitedInventors: Wenlong Zhang, Chuhong Yang, Yarui Zheng, Shengyu Zhang
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Publication number: 20230115860Abstract: A production line device prepares a superconducting circuit layer on a substrate. The device prepares an under bump metallization (UBM) layer on an upper surface of the superconducting circuit layer. A superconducting connection is formed between the UBM layer and the superconducting circuit layer. The production device prepares a welding spot on an upper surface of the UBM layer to obtain a qubit assembly configured for a flip-chip superconducting quantum chip. A superconducting electrical connection is formed between the welding spot and the UBM layer.Type: ApplicationFiled: October 24, 2022Publication date: April 13, 2023Inventors: Chenji ZOU, Yarui ZHENG, Hui WANG
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Publication number: 20230099146Abstract: This application discloses a coating method for making a chip. The method includes: fixing a substrate on a base. The substrate includes a hole. The method includes controlling an included angle between a plane on which the substrate is located and a deposition direction of a coating material to be greater than 0 degrees and less than 90 degrees. The method includes controlling the substrate to rotate with respect to an axis perpendicular to the plane on which the substrate is located. The method includes during the rotation of the substrate, controlling the coating material to enter the hole along the deposition direction such that the coating material is deposited on a sidewall of the hole.Type: ApplicationFiled: November 28, 2022Publication date: March 30, 2023Inventors: Dengfeng LI, Wenlong ZHANG, Kunliang BU, Maochun DAI, Yarui ZHENG
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Publication number: 20220231215Abstract: A superconducting quantum hybrid system includes: a silicon carbide (SiC) epitaxial layer; and a superconducting qubit line, the superconducting qubit line corresponding to a superconducting qubit, where a designated region of the SiC epitaxial layer includes a nitrogen vacancy (NV) center, the NV center being formed by implanting nitrogen ions into the designated region of the SiC epitaxial layer, and where the superconducting qubit line is located on a surface of the SiC epitaxial layer, the superconducting qubit is coupled to a solid-state defect qubit, and the solid-state defect qubit is a qubit corresponding to the NV center in the designated region.Type: ApplicationFiled: February 3, 2022Publication date: July 21, 2022Inventors: Yu ZHOU, Zhenxing ZHANG, Sainan HUAI, Yarui ZHENG, Shengyu ZHANG
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Publication number: 20220216134Abstract: A manufacturing method for an air bridge structure includes forming a first photoresist structure on a substrate. The first photoresist structure includes a first opening that reveals the substrate. The manufacturing method further includes forming a bridge supporting structure on the substrate by depositing an inorganic bridge supporting material on the substrate based on the first opening in the first photoresist structure, and stripping the first photoresist structure after the deposition. Then, the manufacturing method includes forming a second photoresist structure on the substrate. The second photoresist structure includes at least a second opening that reveals at least a portion of the bridge supporting structure on the substrate. Then, the method include forming the air bridge structure by depositing an air bridge material on the substrate based on the second opening and stripping the second photoresist structure after the deposition. Further, the bridge supporting structure can be removed.Type: ApplicationFiled: March 24, 2022Publication date: July 7, 2022Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Wenlong ZHANG, Chuhong YANG, Sainan HUAI, Yarui ZHENG, Sheng Yu ZHANG, Jiagui FENG, Kanglin XIONG, Biao WU, Yongdan HUANG, Xiao CHEN, Sunan DING
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Publication number: 20220216390Abstract: This disclosure includes a method for fabricating an air bridge, an air bridge structure, and a superconducting quantum chip, and relates to the field of circuit structures. In some examples, a method for fabricating an air bridge includes forming an air bridge brace structure on a substrate, and forming, on the air bridge brace structure and the substrate, an air bridge material layer with one or more openings in the air bridge material layer that reveal the air bridge brace structure. The air bridge material layer with the one or more openings is formed based on a patterned photoresist layer with patterns corresponding to the one or more openings. The method further includes removing, based on the one or more openings in the air bridge material layer, the air bridge brace structure to obtain the air bridge having the one or more openings.Type: ApplicationFiled: March 25, 2022Publication date: July 7, 2022Applicants: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED, SUZHOU INSTITUTE OF NANO-TECH & NANO-BIONICS (SINANO), CHINESE ACADEMY OF SCIENCESInventors: Wenlong ZHANG, Sainan HUAI, Yarui ZHENG, Jiagui FENG, Kanglin XIONG, Sunan DING
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Publication number: 20220147859Abstract: A method for processing a frequency control signal includes providing a square wave pulse to a target qubit, and controlling, after a first time elapses from an end time of the square wave pulse, the target qubit to rotate around a Y axis by a first target distance. The first time has a value that is variable. The method includes performing, after a second time elapses from the first time, a QST measurement on the target qubit and reconstructing a density matrix of the target qubit based on the QST measurement to obtain a phase parameter value of the target qubit associated with the value of the first time. Further, the method includes varying the first time and repeating the QST measurement in response to values of the first time to obtain phase parameter values associated with the values of the first time; and adjusting the frequency control signal accordingly.Type: ApplicationFiled: January 26, 2022Publication date: May 12, 2022Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Zhenxing ZHANG, Yu ZHOU, Yarui ZHENG, Shengyu ZHANG
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Publication number: 20220130784Abstract: This disclosure discloses a method for preparing an indium pillar, a chip substrate and a chip. The method includes: applying a first photoresist layer on a substrate; applying a second photoresist layer on the first photoresist layer; covering a part of a surface of the second photoresist layer; underexposing the part of the second photoresist layer to obtain a processed second photoresist layer; developing and fixing the processed second photoresist layer to form an undercut structure; etching the first photoresist layer through the undercut structure to form an expose area; and depositing an indium material on the exposed area to form an indium pillar solder.Type: ApplicationFiled: January 10, 2022Publication date: April 28, 2022Applicant: Tencent Technology (Shenzhen) Company LimitedInventors: Wenlong ZHANG, Chuhong YANG, Yarui ZHENG, Shengyu ZHANG
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Publication number: 20220092462Abstract: This application discloses methods and devices for a quantum chip, a quantum processor and a quantum computer, and relates to the field of quantum technology. The quantum chip includes a bottom sheet and a top sheet; a qubit array disposed on the top sheet, the qubit array comprising a plurality of qubits distributed in an array structure of M rows by N columns, and M and N being both integers greater than 1; a reading cavity disposed on the bottom sheet, and the reading cavity being configured to acquire status information of a qubit in the qubit array; and the bottom sheet and the top sheet being electrically connected.Type: ApplicationFiled: December 2, 2021Publication date: March 24, 2022Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Sainan HUAI, Yu ZHOU, Zhenxing ZHANG, Yarui ZHENG, Wenlong ZHANG, Chuhong YANG, Maochun DAI, Yicong ZHENG, Shengyu ZHANG
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Publication number: 20220037148Abstract: Embodiments of this disclosure provide a photoresist structure, a patterned deposition layer, a semiconductor chip and a manufacturing method thereof According to the method for manufacturing a photoresist structure, a single photoresist is used, a second photoresist layer having an undercut can be obtained by only one development process using a single developing solution, and the size of the undercut can be controlled by the development time, thereby solving the problems such as difficulty in lift-off caused by adhesion of the deposited material to the sidewall of the photoresist structure in traditional lift-off processes.Type: ApplicationFiled: October 15, 2021Publication date: February 3, 2022Applicant: Tencent Technology (Shenzhen) Company LimitedInventors: Wenlong ZHANG, Yarui ZHENG, Shengyu ZHANG