Patents by Inventor Yashushi DODA

Yashushi DODA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10971514
    Abstract: A multi-tier three-dimensional memory array includes multiple alternating stacks of insulating layers and electrically conductive layers that are vertically stacked. Memory stack structures including memory films and semiconductor channels extend through the alternating stacks. The alternating stacks are formed as alternating stacks of insulating layers and sacrificial material layers, and are subsequently modified by replacing the sacrificial material layers with electrically conductive layers. Structural support during replacement of the sacrificial material layers with the electrically conductive layers is provided by the memory stack structures and dielectric support pillar structures. The dielectric support pillar structures may be formed only for a first-tier structure including a first-tier alternating stack of first insulating layers and first spacer material layers, or may vertically extend over multiple tiers.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: April 6, 2021
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Yoshitaka Otsu, Kei Nozawa, Yashushi Doda, Naoto Hojo, Yoshinobu Tanaka, Koichi Ito, Zhiwei Chen, Yusuke Ikawa, Takeshi Kawamura, Ryoichi Ehara
  • Patent number: 10957706
    Abstract: A multi-tier three-dimensional memory array includes multiple alternating stacks of insulating layers and electrically conductive layers that are vertically stacked. Memory stack structures including memory films and semiconductor channels extend through the alternating stacks. The alternating stacks are formed as alternating stacks of insulating layers and sacrificial material layers, and are subsequently modified by replacing the sacrificial material layers with electrically conductive layers. Structural support during replacement of the sacrificial material layers with the electrically conductive layers is provided by the memory stack structures and dielectric support pillar structures. The dielectric support pillar structures may be formed only for a first-tier structure including a first-tier alternating stack of first insulating layers and first spacer material layers, or may vertically extend over multiple tiers.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: March 23, 2021
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Yoshitaka Otsu, Kei Nozawa, Yashushi Doda, Naoto Hojo, Yoshinobu Tanaka, Koichi Ito
  • Publication number: 20200127005
    Abstract: A multi-tier three-dimensional memory array includes multiple alternating stacks of insulating layers and electrically conductive layers that are vertically stacked. Memory stack structures including memory films and semiconductor channels extend through the alternating stacks. The alternating stacks are formed as alternating stacks of insulating layers and sacrificial material layers, and are subsequently modified by replacing the sacrificial material layers with electrically conductive layers. Structural support during replacement of the sacrificial material layers with the electrically conductive layers is provided by the memory stack structures and dielectric support pillar structures. The dielectric support pillar structures may be formed only for a first-tier structure including a first-tier alternating stack of first insulating layers and first spacer material layers, or may vertically extend over multiple tiers.
    Type: Application
    Filed: February 15, 2019
    Publication date: April 23, 2020
    Inventors: Yoshitaka OTSU, Kei NOZAWA, Yashushi DODA, Naoto HOJO, Yoshinobu TANAKA, Koichi ITO
  • Publication number: 20200127006
    Abstract: A multi-tier three-dimensional memory array includes multiple alternating stacks of insulating layers and electrically conductive layers that are vertically stacked. Memory stack structures including memory films and semiconductor channels extend through the alternating stacks. The alternating stacks are formed as alternating stacks of insulating layers and sacrificial material layers, and are subsequently modified by replacing the sacrificial material layers with electrically conductive layers. Structural support during replacement of the sacrificial material layers with the electrically conductive layers is provided by the memory stack structures and dielectric support pillar structures. The dielectric support pillar structures may be formed only for a first-tier structure including a first-tier alternating stack of first insulating layers and first spacer material layers, or may vertically extend over multiple tiers.
    Type: Application
    Filed: February 15, 2019
    Publication date: April 23, 2020
    Inventors: Yoshitaka OTSU, Kei NOZAWA, Yashushi DODA, Naoto HOJO, Yoshinobu TANAKA, Koichi ITO, Zhiwei CHEN, Yusuke IKAWA, Takeshi KAWAMURA, Ryoichi EHARA