Patents by Inventor Yasri Yudhistira

Yasri Yudhistira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11403453
    Abstract: A method including obtaining verified values of a characteristic of a plurality of patterns on a substrate produced by a device manufacturing process; obtaining computed values of the characteristic using a non-probabilistic model; obtaining values of a residue of the non-probabilistic model based on the verified values and the computed values; and obtaining an attribute of a distribution of the residue based on the values of the residue. Also disclosed herein are methods of computing a probability of defects on a substrate produced by the device manufacturing process, and of obtaining an attribute of a distribution of the residue of a non-probabilistic model.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: August 2, 2022
    Assignee: ASML Netherlands B.V.
    Inventors: Lin Lee Cheong, Bruno La Fontaine, Marc Jurian Kea, Yasri Yudhistira, Maxime Philippe Frederic Genin
  • Patent number: 11054754
    Abstract: Focus metrology patterns and methods are disclosed which do not rely on sub-resolution features. Focus can be measured by measuring asymmetry of the printed pattern (T), or complementary pairs of printed patterns (TN/TM). Asymmetry can be measured by scatterometry. Patterns may be printed using EUV radiation or DUV radiation. A first type of focus metrology pattern comprises first features (422) interleaved with second features (424) A minimum dimension (w1) of each first feature is close to a printing resolution. A maximum dimension (w2) of each second feature in the direction of periodicity is at least twice the minimum dimension of the first features. Each first feature is positioned between two adjacent second features such that a spacing (w1?) and its nearest second feature is between one half and twice the minimum dimension of the first features. A second type of focus metrology pattern comprises features (1122, 1124) arranged in pairs.
    Type: Grant
    Filed: May 28, 2018
    Date of Patent: July 6, 2021
    Assignee: ASML Netherlands B.V.
    Inventors: Frank Staals, Anton Bernhard Van Oosten, Yasri Yudhistira, Carlo Cornelis Maria Luijten, Bert Verstraeten, Jan-Willem Gemmink
  • Publication number: 20210150115
    Abstract: A method including obtaining verified values of a characteristic of a plurality of patterns on a substrate produced by a device manufacturing process; obtaining computed values of the characteristic using a non-probabilistic model; obtaining values of a residue of the non-probabilistic model based on the verified values and the computed values; and obtaining an attribute of a distribution of the residue based on the values of the residue. Also disclosed herein are methods of computing a probability of defects on a substrate produced by the device manufacturing process, and of obtaining an attribute of a distribution of the residue of a non-probabilistic model.
    Type: Application
    Filed: June 20, 2018
    Publication date: May 20, 2021
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Lin Lee CHEONG, Bruno LA FONTAINE, Marc Jurian KEA, Yasri YUDHISTIRA, Maxime Philippe Frederic GENIN
  • Publication number: 20200142324
    Abstract: Focus metrology patterns and methods are disclosed which do not rely on sub-resolution features. Focus can be measured by measuring asymmetry of the printed pattern (T), or complementary pairs of printed patterns (TN/TM). Asymmetry can be measured by scatterometry. Patterns may be printed using EUV radiation or DUV radiation. A first type of focus metrology pattern comprises first features (422) interleaved with second features (424) A minimum dimension (w1) of each first feature is close to a printing resolution. A maximum dimension (w2) of each second feature in the direction of periodicity is at least twice the minimum dimension of the first features. Each first feature is positioned between two adjacent second features such that a spacing (w1?) and its nearest second feature is between one half and twice the minimum dimension of the first features. A second type of focus metrology pattern comprises features (1122, 1124) arranged in pairs.
    Type: Application
    Filed: May 28, 2018
    Publication date: May 7, 2020
    Applicant: ASML Netherlands B.V.
    Inventors: Frank STAALS, Anton Bernhard VAN OOSTEN, Yasri YUDHISTIRA, Carlo Cornelis Maria LUIJTEN, Bert VERSTRAETEN, Jan-Willem GEMMINK
  • Patent number: 7622403
    Abstract: A semiconductor processing system with ultra low-K dielectric is provided including providing a substrate having an electronic circuit, forming an ultra low-K dielectric layer, having porogens, over the substrate, blocking an incoming radiation from a first region of the ultra low-K dielectric layer, evaporating the porogens from a second region of the ultra low-K dielectric layer by projecting the incoming radiation on the second region, and removing the ultra low-K dielectric layer in the first region with a developer.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: November 24, 2009
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Yasri Yudhistira, Johnny Widodo, Bei Chao Zhang, Liang-Choo Hsia
  • Patent number: 7537870
    Abstract: The first and second example embodiments are Pattern Fidelity Optimization Procedures for a Multiple Exposure Scheme. In the third example embodiment, the aperatures from the multiple exposure system can be combined into a single aperture by adding the apertures and modulating the relative transmission thru the respective apertures to match the prescribed dose split determined in above in the first embodiment.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: May 26, 2009
    Assignees: Chartered Semiconductor Manufacturing, Ltd., International Business Machines Corporation
    Inventors: Michael Matthew Crouse, Yasri Yudhistira
  • Publication number: 20080145795
    Abstract: A semiconductor processing system with ultra low-K dielectric is provided including providing a substrate having an electronic circuit, forming an ultra low-K dielectric layer, having porogens, over the substrate, blocking an incoming radiation from a first region of the ultra low-K dielectric layer, evaporating the porogens from a second region of the ultra low-K dielectric layer by projecting the incoming radiation on the second region, and removing the ultra low-K dielectric layer in the first region with a developer.
    Type: Application
    Filed: December 19, 2006
    Publication date: June 19, 2008
    Applicant: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Yasri Yudhistira, Johnny Widodo, Bei Chao Zhang, Liang-Choo Hsia
  • Publication number: 20070031744
    Abstract: The first and second example embodiments are Pattern Fidelity Optimization Procedures for a Multiple Exposure Scheme. In the third example embodiment, the aperatures from the multiple exposure system can be combined into a single aperture by adding the apertures and modulating the relative transmission thru the respective apertures to match the prescribed dose split determined in above in the first embodiment.
    Type: Application
    Filed: June 13, 2006
    Publication date: February 8, 2007
    Inventors: Michael Crouse, Yasri Yudhistira