Patents by Inventor Yasser Ahmed
Yasser Ahmed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11694221Abstract: The present disclosure is directed toward systems, methods, and non-transitory computer readable media that dynamically modify content distribution campaigns based on triggering conditions and actions. In particular, systems described herein can provide a user interface for display to a publisher device that includes a plurality of selectable options for setting triggering conditions and/or actions. For example, the disclosed systems can utilize a machine learning model to generate suggested triggering conditions and/or actions for one or more content distribution campaigns of a provider. Moreover, the disclosed systems can generate custom rules based on selected triggering conditions and actions and apply the custom rules during execution of digital content campaigns. For instance, the disclosed systems can monitor performance of content campaigns, detect triggering conditions, and dynamically modify digital content campaigns based on actions corresponding to the triggering conditions.Type: GrantFiled: January 10, 2022Date of Patent: July 4, 2023Assignee: Meta Platforms, Inc.Inventors: Xiaoxiao Ma, Ko Ching Chang, Mohamed Yasser Ahmed Hammad Nour
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Publication number: 20220129940Abstract: The present disclosure is directed toward systems, methods, and non-transitory computer readable media that dynamically modify content distribution campaigns based on triggering conditions and actions. In particular, systems described herein can provide a user interface for display to a publisher device that includes a plurality of selectable options for setting triggering conditions and/or actions. For example, the disclosed systems can utilize a machine learning model to generate suggested triggering conditions and/or actions for one or more content distribution campaigns of a provider. Moreover, the disclosed systems can generate custom rules based on selected triggering conditions and actions and apply the custom rules during execution of digital content campaigns. For instance, the disclosed systems can monitor performance of content campaigns, detect triggering conditions, and dynamically modify digital content campaigns based on actions corresponding to the triggering conditions.Type: ApplicationFiled: January 10, 2022Publication date: April 28, 2022Inventors: Xiaoxiao Ma, Ko Ching Chang, Mohamed Yasser Ahmed Hammad Nour
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Patent number: 11244347Abstract: The present disclosure is directed toward systems, methods, and non-transitory computer readable media that dynamically modify content distribution campaigns based on triggering conditions and actions. In particular, systems described herein can provide a user interface for display to a publisher device that includes a plurality of selectable options for setting triggering conditions and/or actions. For example, the disclosed systems can utilize a machine learning model to generate suggested triggering conditions and/or actions for one or more content distribution campaigns of a provider. Moreover, the disclosed systems can generate custom rules based on selected triggering conditions and actions and apply the custom rules during execution of digital content campaigns. For instance, the disclosed systems can monitor performance of content campaigns, detect triggering conditions, and dynamically modify digital content campaigns based on actions corresponding to the triggering conditions.Type: GrantFiled: June 2, 2020Date of Patent: February 8, 2022Assignee: Facebook, Inc.Inventors: Xiaoxiao Ma, Ko Ching Chang, Mohamed Yasser Ahmed Hammad Nour
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Patent number: 11023409Abstract: System, methods and apparatus are described that support multimode operation of a data communication interface. An apparatus includes a physical layer interface coupled to a serial bus and configurable for a high-speed mode of communication and a low-speed mode of communication, and a rate detector configured to receive a clock signal from the serial bus, and to use a reference clock to determine a unit interval representative of a data rate of the serial bus. The apparatus may also include interval calculation logic configured to determine an interval related to timing of a data signal transmitted on the serial bus, the interval having a duration expressed as a number of cycles of the reference clock. The physical layer interface may be configured to use the interval to capture data in the data signal.Type: GrantFiled: October 3, 2019Date of Patent: June 1, 2021Assignee: QUALCOMM IncorporatedInventors: Yasser Ahmed, Ying Duan, Shih-Wei Chou
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Publication number: 20210103547Abstract: System, methods and apparatus are described that support multimode operation of a data communication interface. An apparatus includes a physical layer interface coupled to a serial bus and configurable for a high-speed mode of communication and a low-speed mode of communication, and a rate detector configured to receive a clock signal from the serial bus, and to use a reference clock to determine a unit interval representative of a data rate of the serial bus. The apparatus may also include interval calculation logic configured to determine an interval related to timing of a data signal transmitted on the serial bus, the interval having a duration expressed as a number of cycles of the reference clock. The physical layer interface may be configured to use the interval to capture data in the data signal.Type: ApplicationFiled: October 3, 2019Publication date: April 8, 2021Inventors: Yasser AHMED, Ying DUAN, Shih-Wei CHOU
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Publication number: 20200334709Abstract: The present disclosure is directed toward systems, methods, and non-transitory computer readable media that dynamically modify content distribution campaigns based on triggering conditions and actions. In particular, systems described herein can provide a user interface for display to a publisher device that includes a plurality of selectable options for setting triggering conditions and/or actions. For example, the disclosed systems can utilize a machine learning model to generate suggested triggering conditions and/or actions for one or more content distribution campaigns of a provider. Moreover, the disclosed systems can generate custom rules based on selected triggering conditions and actions and apply the custom rules during execution of digital content campaigns. For instance, the disclosed systems can monitor performance of content campaigns, detect triggering conditions, and dynamically modify digital content campaigns based on actions corresponding to the triggering conditions.Type: ApplicationFiled: June 2, 2020Publication date: October 22, 2020Inventors: Xiaoxiao Ma, Ko Ching Chang, Mohamed Yasser Ahmed Hammad Nour
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Patent number: 10692106Abstract: The present disclosure is directed toward systems, methods, and non-transitory computer readable media that dynamically modify content distribution campaigns based on triggering conditions and actions. In particular, systems described herein can provide a user interface for display to a publisher device that includes a plurality of selectable options for setting triggering conditions and/or actions. For example, the disclosed systems can utilize a machine learning model to generate suggested triggering conditions and/or actions for one or more content distribution campaigns of a provider. Moreover, the disclosed systems can generate custom rules based on selected triggering conditions and actions and apply the custom rules during execution of digital content campaigns. For instance, the disclosed systems can monitor performance of content campaigns, detect triggering conditions, and dynamically modify digital content campaigns based on actions corresponding to the triggering conditions.Type: GrantFiled: October 30, 2017Date of Patent: June 23, 2020Assignee: FACEBOOK, INC.Inventors: Xiaoxiao Ma, Ko Ching Chang, Mohamed Yasser Ahmed Hammad Nour
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Patent number: 10313068Abstract: Methods, apparatus, and systems for monitoring and measuring signal characteristics for signals received over a multi-wire, multi-phase interface are disclosed. Signals present on each line of a 3-line communication interface are sampled using auxiliary samplers having a programmable time delay to delay the sampled signal by a set time, as well as a programmable voltage offset. The auxiliary sampler outputs are compared with direct line samples of signals on each of the three lines to generate error signals. From this comparison, an array of error signal data occurring over a particular sampling period may be generated. In turn, waveform characteristics can be determined from the error signal data, such as an eye-pattern. Furthermore, skew measurement may further be effectuated using the auxiliary samplers but determining the time difference of when the error signals of the different wires cross a predetermined threshold.Type: GrantFiled: April 24, 2018Date of Patent: June 4, 2019Assignee: QUALCOMM IncorporatedInventors: Yasser Ahmed, Ying Duan
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Publication number: 20190130436Abstract: The present disclosure is directed toward systems, methods, and non-transitory computer readable media that dynamically modify content distribution campaigns based on triggering conditions and actions. In particular, systems described herein can provide a user interface for display to a publisher device that includes a plurality of selectable options for setting triggering conditions and/or actions. For example, the disclosed systems can utilize a machine learning model to generate suggested triggering conditions and/or actions for one or more content distribution campaigns of a provider. Moreover, the disclosed systems can generate custom rules based on selected triggering conditions and actions and apply the custom rules during execution of digital content campaigns. For instance, the disclosed systems can monitor performance of content campaigns, detect triggering conditions, and dynamically modify digital content campaigns based on actions corresponding to the triggering conditions.Type: ApplicationFiled: October 30, 2017Publication date: May 2, 2019Inventors: Xiaoxiao Ma, Ko Ching Chang, Mohamed Yasser Ahmed Hammad Nour
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Patent number: 10033519Abstract: Methods, apparatus, and systems for data communication over a multi-wire, multi-phase interface are disclosed. A method for calibrating a clock recovery circuit includes recovering a first clock signal from transitions between pairs of symbols representative of successive signaling states of a 3-wire interface, where each pair of symbols includes a first symbol and a second symbol, generating a second clock signal by delaying the first clock signal by a first delay value, generating a third clock signal by delaying the second clock signal, calibrating the second clock signal and the third clock signal by initializing the first delay value such that the first sampling circuit, the second sampling circuit and the third sampling circuit capture the same symbol in a first pair of symbols, and incrementally increasing the first delay value until the second sampling circuit and the third sampling circuit capture different symbols from each pair of symbols.Type: GrantFiled: November 10, 2016Date of Patent: July 24, 2018Assignee: QUALCOMM IncorporatedInventors: Ying Duan, Yasser Ahmed, Abhay Dixit, Harry Huy Dang, Jing Wu
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Publication number: 20180131503Abstract: Methods, apparatus, and systems for data communication over a multi-wire, multi-phase interface are disclosed. A method for calibrating a clock recovery circuit includes recovering a first clock signal from transitions between pairs of symbols representative of successive signaling states of a 3-wire interface, where each pair of symbols includes a first symbol and a second symbol, generating a second clock signal by delaying the first clock signal by a first delay value, generating a third clock signal by delaying the second clock signal, calibrating the second clock signal and the third clock signal by initializing the first delay value such that the first sampling circuit, the second sampling circuit and the third sampling circuit capture the same symbol in a first pair of symbols, and incrementally increasing the first delay value until the second sampling circuit and the third sampling circuit capture different symbols from each pair of symbols.Type: ApplicationFiled: November 10, 2016Publication date: May 10, 2018Inventors: Ying Duan, Yasser Ahmed, Abhay Dixit, Harry Huy Dang, Jing Wu
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Patent number: 8699550Abstract: In order to compensate for phase offset between different sets of circuitry having different synchronous clock domains, transmit (TX) circuitry of one domain is configured to transmit a pattern signal (e.g., a pseudo random bit sequence) to receive (RX) circuitry of the other domain. The RX circuitry cycles through a number of different phase-shifted RX clock signals to determine which selected clock signals result in valid RX pattern signals. The RX circuitry is then able to select one of the phase-shifted clock signals for use in normal processing of an RX data signal received from the TX circuitry.Type: GrantFiled: March 21, 2012Date of Patent: April 15, 2014Assignee: LSI CorporationInventors: Yasser Ahmed, Xingdong Dai
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Patent number: 8687743Abstract: Methods and apparatus are provided for detecting and decoding adaptive equalization training frames (having a frame marker comprised of a string of binary ones and binary zeroes). Training frames are detected by shifting the received data; inserting at least one binary value at one end of the shifted received data to generate a modified version of the received data; applying a logic function to the received data and the modified version of the received data that identifies when corresponding bit positions have different values; and detecting the frame marker when an output of the logic function has a first binary value in an approximate middle of a string of a second binary value. The training frames are decoded using a distance between the approximate center of the frame marker and a predefined binary value in an output of the logic function.Type: GrantFiled: February 14, 2013Date of Patent: April 1, 2014Assignee: Agere Systems LLCInventors: Yasser Ahmed, Xingdong Dai, Mohammad S. Mobin, Lane A. Smith
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Publication number: 20140025350Abstract: Operations of an electronic device are simulated by generating and executing a bit-accurate model of the device using an input signal having at least one transition that corresponds to a step input having a pre-transition value (e.g., 0 for a positive transition) for a specified duration before the transition and a post-transition value (e.g., 1 for a positive transition) for a specified duration after the transition. The corresponding step-response results are differentiated with respect to time to generate impulse-response results for the device. The impulse-response results are converted into the frequency domain to determine frequency-domain characteristics of the device that are used to generate a statistical model of the device, which can be executed to simulate all operations of the device, include low bit-error-rate (BER) simulations that would take too long to simulate using the bit-accurate model.Type: ApplicationFiled: July 20, 2012Publication date: January 23, 2014Applicant: LSI CORPORATIONInventors: Xingdong Dai, Yasser Ahmed
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Publication number: 20130251007Abstract: In order to compensate for phase offset between different sets of circuitry having different synchronous clock domains, transmit (TX) circuitry of one domain is configured to transmit a pattern signal (e.g., a pseudo random bit sequence) to receive (RX) circuitry of the other domain. The RX circuitry cycles through a number of different phase-shifted RX clock signals to determine which selected clock signals result in valid RX pattern signals. The RX circuitry is then able to select one of the phase-shifted clock signals for use in normal processing of an RX data signal received from the TX circuitry.Type: ApplicationFiled: March 21, 2012Publication date: September 26, 2013Applicant: LSI CORPORATIONInventors: Yasser Ahmed, Xingdong Dai
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Patent number: 8428195Abstract: Methods and apparatus are provided for detecting and decoding adaptive equalization training frames (having a frame marker comprised of a string of binary ones and binary zeroes). Training frames are detected by shifting the received data; inserting at least one binary value at one end of the shifted received data to generate a modified version of the received data; applying a logic function to the received data and the modified version of the received data that identifies when corresponding bit positions have different values; and detecting the frame marker when an output of the logic function has a first binary value in an approximate middle of a string of a second binary value. The training frames are decoded using a distance between the approximate center of the frame maker and a predefined binary value in an output of the logic function.Type: GrantFiled: December 31, 2007Date of Patent: April 23, 2013Assignee: Agere Systems LLCInventors: Yasser Ahmed, Xingdong Dai, Mohammad S. Mobin, Lane A. Smith
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Patent number: 7995695Abstract: In an exemplary embodiment, a data alignment system comprises a First-In First-Out register (FIFO), a programmable pattern generator connected to the FIFO, and a controller connected to the programmable pattern generator and the FIFO. The FIFO is configured to provide data to or receive data from a first data lane of a serial data link having one or more lanes. Each data lane of the serial data link is configured to transmit a respective serial data stream. The programmable pattern generator is configured to generate a plurality of alignment symbols. The controller is configured to manage the alignment of the one or more data lanes of the serial data link and the insertion of a selected one of the plurality of alignment symbols into each of the serial data streams.Type: GrantFiled: January 4, 2008Date of Patent: August 9, 2011Assignee: Agere Systems Inc.Inventors: Yasser Ahmed, Xingdong Dai, Vladimir Sindalovsky, Lane Smith
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Patent number: 7714667Abstract: The present invention implements an apparatus for calibrating a phase locked loop (PLL) circuit. The apparatus includes a detector for detecting frequencies of a reference signal and a controlled oscillator contained in the PLL circuit. The detector outputs the frequency difference to a control circuit. The control circuit is programmed to adjust one or more control signals to the controlled oscillator based upon the frequency difference in an orderly fashion to complete the calibration process.Type: GrantFiled: November 2, 2007Date of Patent: May 11, 2010Assignee: Agere Systems Inc.Inventors: Xingdong Dai, Yasser Ahmed, Christopher J. Abel, Shawn Michael Logan
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Patent number: 7698485Abstract: A low-latency, peer-to-peer TDM bus including one or more data lines and one or more control lines is provided. Attached devices access the bus sequentially in order of their bus addresses. During a device's access period, if the device has data to transmit, the device places its address on the data lines, asserts a START signal on the bus, and proceeds to transmit data to the other devices on the bus. When the data transmission is completed, the device asserts an END signal on the bus, thus passing control of the bus to the next device in the sequence. If the device has no data to transmit, the device simply places its address on the data lines, asserts the START signal, and asserts the END signal, and control passes directly to the next device in line. In this manner, each device has an opportunity to transmit on the bus.Type: GrantFiled: February 4, 2008Date of Patent: April 13, 2010Assignee: Agere Systems Inc.Inventor: Yasser Ahmed
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Patent number: 7688924Abstract: An integrated circuit device for use in a node of a communication system is provided. The integrated circuit device includes a memory configured to store data written thereto by a receiver associated with the node in accordance with a receiver clock, and to read data therefrom by a transmitter associated with the node in accordance with a transmitter clock. The integrated circuit device also includes a control logic circuit that is in communication with the memory, and is configured to send a control signal to the transmitter to adjust a speed of the transmitter clock responsive to an operating condition of the memory.Type: GrantFiled: March 24, 2005Date of Patent: March 30, 2010Assignee: Agere Systems Inc.Inventors: Yasser Ahmed, Robert D. Brink, Gregory W. Sheets, Lane A. Smith