Patents by Inventor Yasuaki Hozumi
Yasuaki Hozumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240014156Abstract: A semiconductor module includes: a semiconductor device; a bonding layer that is arranged on the semiconductor device, and contains nickel or copper, an entire back surface of the bonding layer being electrically connected to and in direct contact with an electrode in the semiconductor device; an anti-oxidation layer disposed on the bonding layer; and a protective layer disposed directly on a top surface of a peripheral portion of the bonding layer on which the anti-oxidation layer is absent, covering an outer peripheral edge of the bonding layer, wherein the protective layer is made of an electrically insulating resin.Type: ApplicationFiled: September 20, 2023Publication date: January 11, 2024Applicant: Fuji Electric Co., Ltd.Inventor: Yasuaki HOZUMI
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Publication number: 20230387062Abstract: A semiconductor device encompasses a mounting member having a copper-based wiring layer; first covering layer which contains nickel, covering the wiring layer so that a part of upper surface of the wiring layer is exposed in opening; joint layer metallurgically joined to the wiring layer in the opening; second covering layer which contains nickel, metallurgically joined to the joint layer on upper surface of the joint layer; semiconductor chip having bottom surface covered with the second covering layer. The joint layer has lower layer in contact with the wiring layer, upper layer in contact with the second covering layer, and intermediate layer between the lower layer and the upper layer, the lower layer and the upper layer have intermetallic compounds as main components which contain tin, copper and nickel, and the intermediate layer is alloy containing tin as the main component and no lead.Type: ApplicationFiled: April 24, 2023Publication date: November 30, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Fumihiko MOMOSE, Hirohisa OYAMA, Yasuaki HOZUMI
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Patent number: 11824024Abstract: A semiconductor module includes: a semiconductor device; a bonding layer that is arranged on the semiconductor device, contains nickel or copper, and is electrically connected to the semiconductor device; a solder portion containing gold, disposed on the bonding layer; and a protective layer disposed directly on the bonding layer, covering an outer peripheral edge of the bonding layer.Type: GrantFiled: May 25, 2022Date of Patent: November 21, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventor: Yasuaki Hozumi
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Publication number: 20230307346Abstract: A method of manufacturing a semiconductor device, includes; preparing an insulated circuit substrate including a circuit layer having a main surface and a side surface inclined to a normal direction of the main surface; irradiating the side surface of the circuit layer with a laser beam so as to roughen at least a part of the side surface of the circuit layer and provide an oxide film on the roughened side surface of the circuit layer; and bonding a semiconductor chip to the main surface of the circuit layer via a solder layer.Type: ApplicationFiled: January 27, 2023Publication date: September 28, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Yasuaki HOZUMI, Fumihiko MOMOSE, Natsuki TAKEISHI, Ryoto UCHIYAMA
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Publication number: 20220285301Abstract: A semiconductor module includes: a semiconductor device; a bonding layer that is arranged on the semiconductor device, contains nickel or copper, and is electrically connected to the semiconductor device; a solder portion containing gold, disposed on the bonding layer; and a protective layer disposed directly on the bonding layer, covering an outer peripheral edge of the bonding layer.Type: ApplicationFiled: May 25, 2022Publication date: September 8, 2022Applicant: Fuji Electric Co., Ltd.Inventor: Yasuaki HOZUMI
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Patent number: 11424203Abstract: A semiconductor module includes: a semiconductor device; a bonding layer that is arranged on the semiconductor device, contains nickel or copper, and is electrically connected to the semiconductor device; a solder portion containing gold, disposed on the bonding layer; and a protective layer disposed directly on the bonding layer, covering an outer peripheral edge of the bonding layer.Type: GrantFiled: April 2, 2020Date of Patent: August 23, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventor: Yasuaki Hozumi
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Publication number: 20200365538Abstract: A semiconductor module includes: a semiconductor device; a bonding layer that is arranged on the semiconductor device, contains nickel or copper, and is electrically connected to the semiconductor device; a solder portion containing gold, disposed on the bonding layer; and a protective layer disposed directly on the bonding layer, covering an outer peripheral edge of the bonding layer.Type: ApplicationFiled: April 2, 2020Publication date: November 19, 2020Applicant: Fuji Electric Co., Ltd.Inventor: Yasuaki HOZUMI
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Patent number: 9659592Abstract: A perpendicular magnetic recording medium exhibits reduced noise and improved performance in such measures as SN ratio, and can realize high magnetic recording densities. In the perpendicular magnetic recording medium, at least a first nonmagnetic intermediate layer, second nonmagnetic intermediate layer, and magnetic recording layer are stacked in order on a nonmagnetic substrate. The first nonmagnetic intermediate layer is formed from a CoCrRuW alloy, and the second nonmagnetic intermediate layer is formed from an Ru-base alloy.Type: GrantFiled: May 1, 2012Date of Patent: May 23, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventors: Toyoji Ataka, Shunji Takenoiri, Sadayuki Watanabe, Hirohisa Oyama, Yasuaki Hozumi, Satoshi Takahashi
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Patent number: 8846219Abstract: This document discloses a perpendicular magnetic recording medium in which the magnetic anisotropy of a magnetic recording layer is raised and the thermal stability of recorded signals is improved without changing the conventional stacked configuration. A perpendicular magnetic recording medium is formed by stacking at least an intermediate layer, a second underlayer, and a magnetic recording layer in this order on a nonmagnetic base. The intermediate layer is either a single layer of Ru or a Ru-based alloy, or a stacked structure of a nonmagnetic alloy film including Co and Cr and a film of Ru or a Ru-based alloy. The second underlayer includes Co in the range from 30 at % to 75 at %, Cr in the range from 20 at % to 60 at %, and W in the range from 0.1 at % to 10 at %, and has a thickness in the range from 0.1 nm to 1.0 nm.Type: GrantFiled: March 9, 2012Date of Patent: September 30, 2014Assignee: Fuji Electric Co., Ltd.Inventor: Yasuaki Hozumi
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Publication number: 20130209836Abstract: A perpendicular magnetic recording medium exhibits reduced noise and improved performance in such measures as SN ratio, and can realize high magnetic recording densities. In the perpendicular magnetic recording medium, at least a first nonmagnetic intermediate layer, second nonmagnetic intermediate layer, and magnetic recording layer are stacked in order on a nonmagnetic substrate. The first nonmagnetic intermediate layer is formed from a CoCrRuW alloy, and the second nonmagnetic intermediate layer is formed from an Ru-base alloy.Type: ApplicationFiled: May 1, 2012Publication date: August 15, 2013Applicant: FUJI ELECTRIC CO., LTD.Inventors: Toyoji Ataka, Shunji Takenoiri, Sadayuki Watanabe, Hirohisa Oyama, Yasuaki Hozumi, Satoshi Takahashi
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Publication number: 20120288735Abstract: This document discloses a perpendicular magnetic recording medium in which the magnetic anisotropy of a magnetic recording layer is raised and the thermal stability of recorded signals is improved without changing the conventional stacked configuration. A perpendicular magnetic recording medium is formed by stacking at least an intermediate layer, a second underlayer, and a magnetic recording layer in this order on a nonmagnetic base. The intermediate layer is either a single layer of Ru or a Ru-based alloy, or a stacked structure of a nonmagnetic alloy film including Co and Cr and a film of Ru or a Ru-based alloy. The second underlayer includes Co in the range from 30 at % to 75 at %, Cr in the range from 20 at % to 60 at %, and W in the range from 0.1 at % to 10 at %, and has a thickness in the range from 0.1 nm to 1.0 nm.Type: ApplicationFiled: March 9, 2012Publication date: November 15, 2012Applicant: FUJI ELECTRIC CO., LTD.Inventor: Yasuaki Hozumi