Patents by Inventor Yasuaki Ohtani

Yasuaki Ohtani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5096524
    Abstract: An automatic silk stretching apparatus for stretching silk on a silk screen printing frame is provided. At first silk is stretched to four sides by first stage stretching by cramp table and second stage stretching by stretchers on the cramp table. From lower side of the cramped silk, a printing frame on an elevator table is lifted and urges the silk. Adhesive is applied on the frame, and is forcibly dried. Then, the excess silk surrounding the frame is cut. The silk stretched frame is discharged, an empty frame is fed and further new silk is cramped.
    Type: Grant
    Filed: August 22, 1990
    Date of Patent: March 17, 1992
    Assignees: Nippon CMK Corp., Iwase Sangyo Co., Itohdenki Kanto Hanbai
    Inventors: Yasuaki Ohtani, Isamu Kubo, Kohji Ohtake, Kazuo Hayashi
  • Patent number: 4978414
    Abstract: An automatic silk stretching apparatus for stretching silk on a silk screen printing frame is provided. At first silk is stretched to four sides by first stage stretching by cramp table and second stage stretching by stretchers on the cramp table. From lower side of the cramped silk, a printing frame on an elevator table is lifted and urges the silk. Adhesive is applied on the frame, and is forcibly dried. Then, the excess silk surrounding the frame is cut. The silk stretched frame is discharged, an empty frame is fed and further new silk is cramped.
    Type: Grant
    Filed: December 31, 1985
    Date of Patent: December 18, 1990
    Assignees: Nippon CMK Corp., Iwase Sangyo Co., Itohdenki Kanto Hanbai Co.
    Inventors: Yasuaki Ohtani, Isamu Kubo, Kohji Ohtake, Kazuo Hayashi
  • Patent number: 4779339
    Abstract: A method of producing printed circuit boards comprises the steps of applying a first solder resist on the conductor circuit pattern so as to surround lands to be soldered in the pattern and then applying a second solder resist to the whole surface of the pattern so as to leave portions having a size larger than the size of the land and smaller than the outer diameter of the first solder resist.
    Type: Grant
    Filed: May 6, 1987
    Date of Patent: October 25, 1988
    Assignee: Nippon CMK Corporation
    Inventors: Yasuaki Ohtani, Fusao Birukawa