Patents by Inventor Yasuaki Takahara

Yasuaki Takahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5493710
    Abstract: A communication system which includes a receiving section having a frequency convertor for converting a received signal into an intermediate frequency signal by mixing with a local oscillation signal, and a demodulator for demodulating the received signal converted into the intermediate frequency signal, a transmission section for modulating a transmission signal received thereby, to transmit the so modulated signal, and an input/output section for receiving the demodulated signal from the receiving section and outputting it externally and receiving the transmission signal externally and outputting it to the transmission section.
    Type: Grant
    Filed: August 3, 1992
    Date of Patent: February 20, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Yasuaki Takahara, Shigeyuki Sudo
  • Patent number: 5450613
    Abstract: A mobile communications equipment which communicates with another equipment through a base station, and in which the state change of the mobile communications equipment based on the movement thereof, such as the movement from outside a service area into the service area, is detected and is notified to the user of the mobile communications equipment.
    Type: Grant
    Filed: August 27, 1993
    Date of Patent: September 12, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Yasuaki Takahara, Shigeyuki Sudo, Shuuichi Sekiguchi
  • Patent number: 5361047
    Abstract: A .pi./4 shift QPSK modulator for receiving digital signals and for outputting a modulated signal therefrom in accordance with each of the inputted digital signals. The .pi./4 QPSK modulator is utilized in a communication apparatus and includes a counter for counting the number of the inputted digital signals, a phase information arithmetic unit for receiving a value of an output from the counter and a value of each of the inputted digital signals for outputting phase information of the signal to be modulated, an arithmetic unit for performing an arithmetic operation on values representing an impulse response of the output phase information from the phase information arithmetic unit and outputting impulse response values in accordance therewith, and an accumulating unit for accumulating impulse response values outputted from the arithmetic unit and for performing an arithmetic operation for enabling generation of a .pi./4 shift QPSK modulated signal.
    Type: Grant
    Filed: May 5, 1993
    Date of Patent: November 1, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Yasuaki Takahara, Tomohiro Esaki, Shigeyuki Sudo, Teiji Okamoto
  • Patent number: 5210775
    Abstract: A .pi./4 shift QPSK modulator for receiving digital signals and for outputting a modulated signal therefrom in accordance with each of the inputted digital signals. The .pi./4 QPSK modulator is utilized in a communication apparatus and includes a counter for counting the number of the inputted digital signals, a phase information arithmetic unit for receiving a value of an output from the counter and a value of each of the inputted digital signals for outputting phase information of the signal to be modulated, an arithmetic unit for performing an arithmetic operation on values representing an impulse response of the output phase information from the phase information arithmetic unit and outputting impulse response values in accordance therewith, and an accumulating unit for accumulating impulse response values outputted from the arithmetic unit and for performing an arithmetic operation for enabling generation of a .pi./4 shift QPSK modulated signal.
    Type: Grant
    Filed: February 12, 1991
    Date of Patent: May 11, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Yasuaki Takahara, Tomohiro Ezaki, Shigeyuki Sudo, Teiji Okamoto
  • Patent number: 4773026
    Abstract: A picture display memory system with structure for changing over an address selection signal and data input signal fed to a picture memory depending upon whether the picture information is consecutive in the depth direction or is consecutive in the horizontal direction. When the picture information in the depth direction is to be written, the address selection signal is supplied to the picture memory to select a particular bit in the horizontal direction of the picture memory as an address, and the picture information of the depth direction is written into memory as a data input. When the picture information in the horizontal direction is to be written, bits in the horizontal direction are selected in accordance with the data contents of the picture pattern in the horizontal direction, and data stored in a register which stored beforehand the picture information of the depth direction is written into memory as a data input.
    Type: Grant
    Filed: September 26, 1984
    Date of Patent: September 20, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Yasuaki Takahara, Atsuki Edamura, Tetsuya Ikeda, Teiji Okamoto