Abstract: A braking system for image forming apparatus returns an optical scan system in the image forming apparatus to a preselected home position after each scan of a document placed on a platen, within a predetermined period of time. Various factors including temperature, the number of copies of the document previously made, can change the operating performance of the braking system so that it does not return the optical scan system to the home position within the predetermined period. Detectors are provided to detect and sense the factors which will change the operating performance of the braking system. Brake control apparatus is responsive to the detectors and controls the braking system to return the optical scan system to its home position within the preselected period of time to thereby maintain the efficiency of the braking system even as the factors such as temperature, and number of copies previously made changes during operation of the image forming apparatus.

Abstract: A fail-safe apparatus for an image forming apparatus includes a central processing unit (CPU), a drive section or load, a disconnecting circuit, and a watchdog circuit. The CPU controls an image forming sequence. The drive section or load is controlled by the CPU through an input-output controller. The disconcerting circuit disconnects power supply to the drive section or load upon reception of a trigger signal. The watchdog circuit monitors an operation of the CPU so as to output a reset signal to the CPU and the input-output controller upon detection of an operation abnormality, and to output the trigger signal to the disconnecting circuit.

Abstract: A power source unit for an image recording apparatus having a CPU which controls an operation sequence of a load, includes a current sensor and a relay. The current sensor senses a load current. The relay is connected to a supply path to the load. The relay is operated to interrupt the supply path to the load when the CPU determines that the load current sensed by the current sensor exceeds a current limit value which is determined in advance for every operation cycle of the unit.

Abstract: A circuit board for mounting a CPU for controlling an image processing apparatus, comprising a multilayered circuit board for mounting the CPU, and a shield layer for shielding the multilayered circuit board without connecting the shield layer to the circuits of the board. The circuits of the multilayered circuit board are produced by a printing or an electrolytic plating method or an electroless plating method.

Abstract: A recording apparatus includes: a main switch for turning on/off a power source; a sub switch for turning on/off the power source by an open/close operation of an open/close portion of the apparatus; a memory for storing recording conditions which are set when the power source is turned off; and circuitry which sets a recording condition for initializing the recording conditions to predetermined values when the power switch is turned on after being turned off by the main switch, and for reading out and resetting the recording conditions stored in the memory when the power source is turned on after being turned off by the sub switch, thereby recording by an electrophotographic process in accordance with the recording conditions set by the circuitry for setting the recording condition.