Patents by Inventor Yasufumi Sakai
Yasufumi Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10728058Abstract: A decision feedback equalizer includes: a comparison circuit; a latch circuit configured to latch a result of comparison by the comparison circuit; a setting circuit configured to set a decision threshold of the comparison circuit in accordance with a control signal; and a switch circuit configured to be controlled to be turned on and off by an output signal from the latch circuit, wherein the setting circuit is configured to be connected in parallel with an input stage of the comparison circuit through the switch circuit and operate in synchronization with a clock signal for driving the comparison circuit.Type: GrantFiled: June 25, 2019Date of Patent: July 28, 2020Assignee: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Patent number: 10727795Abstract: An amplifier circuit includes: an amplifier; and a bias circuit that controls an operation point of the amplifier. The amplifier includes: a load resistor; a differential transistor pair electrically coupled to the load resistor; and a tail transistor electrically coupled to the differential transistor pair. The bias circuit includes: a voltage generator circuit that generates a reference voltage corresponding to a sum of a threshold voltage of a transistor in the differential transistor pair and a saturation drain voltage of the tail transistor; and a current generator circuit that generates a reference current that is proportional to a difference between a power supply voltage of the amplifier circuit and the reference voltage by using a reference resistor. The current generator circuit is electrically coupled to the amplifier such that a tail current that flows through the tail transistor is proportional to the reference current.Type: GrantFiled: March 16, 2018Date of Patent: July 28, 2020Assignee: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Patent number: 10715090Abstract: A bias circuit includes a replica circuit for an amplifier circuit using a cascode type inverter, and a generation circuit that generates a bias voltage that causes a drain voltage of an input stage transistor of the amplifier circuit to be a saturation drain voltage, based on an output voltage of the replica circuit, and supplies the generated bias voltage to a cascode element of the amplifier circuit and a cascode element of the replica circuit.Type: GrantFiled: July 17, 2018Date of Patent: July 14, 2020Assignee: FUJITSU LIMITEDInventors: Yasufumi Sakai, Yoshiyasu Doi
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Publication number: 20200062573Abstract: A pump mechanism that allows a beverage dispenser to be formed compact in its width direction in spite of inclusion of a plurality of tube pumps. A first tube pump and a second tube pump are disposed on the left and right sides of a motor on more front side than this motor in such a manner that a first rotational shaft of a first rotor and a second rotational shaft of a second rotor extend perpendicularly to an output shaft. A first transmission mechanism for transmitting power outputted from the output shaft to the first rotor includes a first clutch mechanism configured to transmit rotation of the output shaft in a first direction to the first rotor, but not to transmit rotation of the output shaft in a second direction to the first rotor.Type: ApplicationFiled: November 2, 2017Publication date: February 27, 2020Applicant: SUNTORY HOLDINGS LIMITEDInventors: Yuuji SUZUKI, Masatoshi AIHARA, Hiroki YOKOYAMA, Yasufumi SAKAI, Ryuta IKEDA
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Publication number: 20200055719Abstract: A flexible container (80) includes a reservoir part (82) that reserves a liquid and a discharge passage part (81) that communicates with the reservoir part (82) to take out the liquid. A discharge pump includes a plurality of roller parts (50) that press the discharge passage part (81) and an endless transfer mechanism unit (60) that has the plurality of roller parts (50) attached at a predetermined interval and causes the roller parts (50) to go around. The endless transfer mechanism unit (60) has an arrangement including a straight-line portion in which the roller parts (50) linearly move, in a path of the go-around movement. An attachment interval of the plurality of roller parts (50) is set to such an interval that before a certain roller part (50) going around reaches a position where the certain roller part (50) does not press the discharge passage part (81), a subsequent roller part (50) is able to reach a position where the subsequent roller part (50) presses the discharge passage part (81).Type: ApplicationFiled: October 20, 2017Publication date: February 20, 2020Inventors: Yasufumi Sakai, Yuji Suzuki, Masatoshi Aihara, Hiroki Yokoyama
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Publication number: 20190337787Abstract: A flexible container (80) is held and pressed by an extrusion mechanism unit (10) to continuously apply a pressure to a content in the container. A discharge passage part (81) of the flexible container (80) is pressed by roller parts while the roller parts are linearly moved with an endless transfer mechanism unit (60), and the discharge passage part (81) expanded with an inflow of the content is put into a state of being sequentially squeezed by the roller parts. Therefore, the content in the discharge passage part (81) is advanced toward an end of the discharge passage part in accordance with the linear movement of the roller parts and it is possible to discharge a proper amount of content by adjusting a state of movement of the roller parts.Type: ApplicationFiled: October 20, 2017Publication date: November 7, 2019Inventors: Yasufumi Sakai, Yuji Suzuki, Masatoshi Aihara, Hiroki Yokoyama
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Publication number: 20190312757Abstract: A decision feedback equalizer includes: a comparison circuit; a latch circuit configured to latch a result of comparison by the comparison circuit; a setting circuit configured to set a decision threshold of the comparison circuit in accordance with a control signal; and a switch circuit configured to be controlled to be turned on and off by an output signal from the latch circuit, wherein the setting circuit is configured to be connected in parallel with an input stage of the comparison circuit through the switch circuit and operate in synchronization with a clock signal for driving the comparison circuit.Type: ApplicationFiled: June 25, 2019Publication date: October 10, 2019Applicant: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Patent number: 10367583Abstract: There is provided a driver circuit including a variable current-source configured to include, a first current-source coupled to a first input node to which a first signal is input from an external, a second current-source coupled to a second input node to which a second signal as an inversion of the first signal is input from the external, a first bypass circuit coupled between the first current-source and the first input node, the first bypass circuit being switched according to the second signal, and a second bypass circuit coupled between the second current-source and the second input node, the second bypass circuit being switched according to the first signal, and a terminal circuit configured to be terminated for an optical device driven by a drive signal according to the first signal, the drive signal being output from an output node coupled between the terminal circuit and the variable current-source.Type: GrantFiled: May 3, 2018Date of Patent: July 30, 2019Assignee: FUJITSU LIMITEDInventors: Yuuki Ogata, Toshihiko Mori, Yasufumi Sakai
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Patent number: 10326582Abstract: An optical transmitter includes: an optical modulator, a phase adjustment circuit, first and second synchronization circuits, and first and second drive circuits. The optical modulator includes a first modulation area and a second modulation area that is provided at output side of the first modulation area. The phase adjustment circuit adjusts a phase of a first clock signal so as to generate a second clock signal. The first and second synchronization circuits respectively output first and second electric signals in synchronization with the first and second clock signals. The first and second drive circuits respectively drive the first and second modulation areas with the first and second electric signals.Type: GrantFiled: March 16, 2018Date of Patent: June 18, 2019Assignee: FUJITSU LIMITEDInventors: Yasufumi Sakai, Takayuki Shibasaki
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Publication number: 20190028071Abstract: A bias circuit includes a replica circuit for an amplifier circuit using a cascode type inverter, and a generation circuit that generates a bias voltage that causes a drain voltage of an input stage transistor of the amplifier circuit to be a saturation drain voltage, based on an output voltage of the replica circuit, and supplies the generated bias voltage to a cascode element of the amplifier circuit and a cascode element of the replica circuit.Type: ApplicationFiled: July 17, 2018Publication date: January 24, 2019Applicant: FUJITSU LIMITEDInventors: Yasufumi Sakai, Yoshiyasu Doi
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Patent number: 10171273Abstract: There is provided a decision feedback equalizer including a comparison circuit configured to compare a value indicated as 2n of a pulse amplitude modulated signal with a threshold value, wherein n is an integer of 2 or more, a latch circuit configured to retain data of a comparison result of the comparison circuit, a decoder configured to decode the retained data by the latch circuit, and a setting circuit configured to set the threshold value based on the retained data fed back from the latch circuit.Type: GrantFiled: February 8, 2018Date of Patent: January 1, 2019Assignee: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Publication number: 20180337732Abstract: There is provided a driver circuit including a variable current-source configured to include, a first current-source coupled to a first input node to which a first signal is input from an external, a second current-source coupled to a second input node to which a second signal as an inversion of the first signal is input from the external, a first bypass circuit coupled between the first current-source and the first input node, the first bypass circuit being switched according to the second signal, and a second bypass circuit coupled between the second current-source and the second input node, the second bypass circuit being switched according to the first signal, and a terminal circuit configured to be terminated for an optical device driven by a drive signal according to the first signal, the drive signal being output from an output node coupled between the terminal circuit and the variable current-source.Type: ApplicationFiled: May 3, 2018Publication date: November 22, 2018Applicant: FUJITSU LIMITEDInventors: Yuuki Ogata, Toshihiko Mori, Yasufumi Sakai
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Publication number: 20180316483Abstract: An optical transmitter includes: an optical modulator, a phase adjustment circuit, first and second synchronization circuits, and first and second drive circuits. The optical modulator includes a first modulation area and a second modulation area that is provided at output side of the first modulation area. The phase adjustment circuit adjusts a phase of a first clock signal so as to generate a second clock signal. The first and second synchronization circuits respectively output first and second electric signals in synchronization with the first and second clock signals. The first and second drive circuits respectively drive the first and second modulation areas with the first and second electric signals.Type: ApplicationFiled: March 16, 2018Publication date: November 1, 2018Applicant: FUJITSU LIMITEDInventors: Yasufumi Sakai, Takayuki Shibasaki
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Publication number: 20180316325Abstract: An amplifier circuit includes: an amplifier; and a bias circuit that controls an operation point of the amplifier. The amplifier includes: a load resistor; a differential transistor pair electrically coupled to the load resistor; and a tail transistor electrically coupled to the differential transistor pair. The bias circuit includes: a voltage generator circuit that generates a reference voltage corresponding to a sum of a threshold voltage of a transistor in the differential transistor pair and a saturation drain voltage of the tail transistor; and a current generator circuit that generates a reference current that is proportional to a difference between a power supply voltage of the amplifier circuit and the reference voltage by using a reference resistor. The current generator circuit is electrically coupled to the amplifier such that a tail current that flows through the tail transistor is proportional to the reference current.Type: ApplicationFiled: March 16, 2018Publication date: November 1, 2018Applicant: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Publication number: 20180241592Abstract: There is provided a decision feedback equalizer including a comparison circuit configured to compare a value indicated as 2n of a pulse amplitude modulated signal with a threshold value, wherein n is an integer of 2 or more, a latch circuit configured to retain data of a comparison result of the comparison circuit, a decoder configured to decode the retained data by the latch circuit, and a setting circuit configured to set the threshold value based on the retained data fed back from the latch circuit.Type: ApplicationFiled: February 8, 2018Publication date: August 23, 2018Applicant: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Patent number: 9973357Abstract: A decision feedback equalizer includes a comparator configured to output a constant voltage in a reset period and to output a differential voltage corresponding to differential input signals in an evaluation period, a latch circuit configured to hold the differential voltage in the evaluation period, and an adjuster configured to adjust a logical threshold of the latch circuit closer to the output voltage in the reset period.Type: GrantFiled: June 2, 2017Date of Patent: May 15, 2018Assignee: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Publication number: 20170373889Abstract: A decision feedback equalizer includes a comparator configured to output a constant voltage in a reset period and to output a differential voltage corresponding to differential input signals in an evaluation period, a latch circuit configured to hold the differential voltage in the evaluation period, and an adjuster configured to adjust a logical threshold of the latch circuit closer to the output voltage in the reset period.Type: ApplicationFiled: June 2, 2017Publication date: December 28, 2017Applicant: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Patent number: 9800436Abstract: A receiver includes: a frequency-characteristic-changing-circuit to change a frequency characteristic of an input signal in which N-level data value is pulse-amplitude-modulated, to generate a frequency-characteristic-changed-signal; a controller to control the frequency-characteristic-changing-circuit to obtain a desired ratio between a amplitude component of a target data value corresponding to the frequency-characteristic-changed-signal at a first timing and a second amplitude component thereof at a second timing which is later than the first timing; and a decision-feedback-equalization-circuit to which the frequency-characteristic-changed-signal is input, wherein the decision-feedback-equalization-circuit includes: a comparison-circuit to include comparators each to output a comparison result obtained from comparing the target data value and a threshold value, and N?1 selection circuits each to select one of comparison results output from the comparators at the second timing, based on the comparison resulType: GrantFiled: November 29, 2016Date of Patent: October 24, 2017Assignee: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Publication number: 20170187552Abstract: A receiver includes: a frequency-characteristic-changing-circuit to change a frequency characteristic of an input signal in which N-level data value is pulse-amplitude-modulated, to generate a frequency-characteristic-changed-signal; a controller to control the frequency-characteristic-changing-circuit to obtain a desired ratio between a amplitude component of a target data value corresponding to the frequency-characteristic-changed-signal at a first timing and a second amplitude component thereof at a second timing which is later than the first timing; and a decision-feedback-equalization-circuit to which the frequency-characteristic-changed-signal is input, wherein the decision-feedback-equalization-circuit includes: a comparison-circuit to include comparators each to output a comparison result obtained from comparing the target data value and a threshold value, and N?1 selection circuits each to select one of comparison results output from the comparators at the second timing, based on the comparison resulType: ApplicationFiled: November 29, 2016Publication date: June 29, 2017Applicant: FUJITSU LIMITEDInventor: Yasufumi Sakai
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Patent number: 9614440Abstract: A power supply device includes a linear regulator including an output stage amplifier, a current sensing circuit, and a switching regulator. The current sensing circuit detects an output current of the linear regulator, and is disposed in parallel with the output stage amplifier, in a configuration corresponding to the output stage amplifier. The switching regulator operates in accordance with an output signal of the current sensing circuit. The linear regulator and the switching regulator operate in collaboration with each other to generate an output voltage at an output node.Type: GrantFiled: November 18, 2013Date of Patent: April 4, 2017Assignee: FUJITSU LIMITEDInventors: Kazuaki Oishi, Eiji Yoshida, Yasufumi Sakai