Patents by Inventor Yasuharu Nakajima

Yasuharu Nakajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7791795
    Abstract: A microscope for focusing by inserting a split prism at a focusing support time. The image of an iris stop is branched into such two images by the angle deflecting action of the split prism as are individually shifted and focused at symmetric positions across the optical axis of the microscope. These two branched images of the iris stop are further focused on an objective lens through a beam splitter by the focusing action of a lens. The operation unit of a vertical motion device is operated to move an optical system up and down so that the images of a focused pattern are viewed to move in opposite directions from each other in the field of view.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: September 7, 2010
    Assignee: Nikon Corporation
    Inventor: Yasuharu Nakajima
  • Patent number: 7766507
    Abstract: A light beam emitted from a light source (11) impinges on the spherical surface (20a) of a collimator lens (20) substantially perpendicularly thereto. A light beam making a small angle to the optical axis impinges on the ellipsoid (20c) and then it is refracted. The ellipsoid (20c) converts light beams diverging from a light source located at the first focal point thereof into parallel light beams. A light beam making a large angle to the optical axis impinges on an ellipsoid (20b) and then it is reflected totally off the ellipsoid (20b). A light beam diverging from a light source located at the first focal point of the ellipsoid (20b) is converted into a light beam being focused on the second focal point thereof. An ellipsoid (20d) converts the light beams focused on the second focal point thereof into parallel light beams.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: August 3, 2010
    Assignee: Nikon Corporation
    Inventor: Yasuharu Nakajima
  • Publication number: 20100118411
    Abstract: Provided is a small size optical system having functions of a luminous flux splitting optical system or those of a luminous flux integrating optical system and functions of a fly's eye integrator. The integrator is provided with two surfaces. A first surface (111) is composed of a first unit surface, i.e., a positive refractive surface, and a second surface (113) is composed of a second unit surface, i.e., a positive refractive surface. Prescribed n number of second unit surfaces (113a, 113b) correspond to a prescribed first unit surface (111a). Light which entered the n number of second unit surfaces and parallel to the optical axis of the prescribed first unit surface is collected to the center of the prescribed first unit surface. The n number of second unit surfaces are arranged not to be adjacent to each other on a refractive surface having substantially the same diffractive power as that of the refractive surface of the prescribed first unit surface.
    Type: Application
    Filed: January 19, 2010
    Publication date: May 13, 2010
    Applicant: NIKON CORPORATION
    Inventor: Yasuharu Nakajima
  • Publication number: 20090231846
    Abstract: A light beam emitted from a light source (11) impinges on the spherical surface (20a) of a collimator lens (20) substantially perpendicularly thereto. A light beam making a small angle to the optical axis impinges on the ellipsoid (20c) and then it is refracted. The ellipsoid (20c) converts light beams diverging from a light source located at the first focal point thereof into parallel light beams. A light beam making a large angle to the optical axis impinges on an ellipsoid (20b) and then it is reflected totally off the ellipsoid (20b). A light beam diverging from a light source located at the first focal point of the ellipsoid (20b) is converted into a light beam being focused on the second focal point thereof. An ellipsoid (20d) converts the light beams focused on the second focal point thereof into parallel light beams.
    Type: Application
    Filed: May 21, 2009
    Publication date: September 17, 2009
    Applicant: NIKON CORPORATION
    Inventor: Yasuharu Nakajima
  • Publication number: 20090080069
    Abstract: Provided is a microscope for focusing by inserting a split prism (5) at a focusing support time. The image of an iris stop (30) is branched into such two images by the angle deflecting action of the split prism (5) as are individually shifted and focused at symmetric positions across the optical axis of the microscope. These two branched images of the iris stop (30) are further focused on an objective lens (23) through a beam splitter (22) by the focusing action of a lens (21). The operation unit of a vertical motion device is operated to move an optical system up and down so that the images of a focused pattern (16) are viewed to move in opposite directions from each other in the field of view. At the focusing time when the focal position of the objective lens (23) is focused on a sample face (24), the images of the focused pattern (15) look in the registered state. Thus, the focusing action can be made highly precise without being restricted by the magnification or NA of the objective lens.
    Type: Application
    Filed: October 28, 2008
    Publication date: March 26, 2009
    Applicant: NIKON CORPORATION
    Inventor: Yasuharu Nakajima
  • Patent number: 7307725
    Abstract: A surface inspection apparatus includes: a light source unit that emits a divergent light flux of predetermined linearly polarized light to be used to illuminate a test substrate; a first optical member that allows the divergent light flux of the predetermined linearly polarized light to enter therein with a predetermined angle of incidence and then guides a light flux to the test substrate; a second optical member that allows a light flux from the test substrate to enter therein, emits a convergent light flux thereof with a predetermined angle of emergence and forms an image at a specific surface; an extraction unit that extracts linearly polarized light in the convergent light flux from the second optical member, which is perpendicular to the predetermined linearly polarized light; a light-receiving unit that receives an image of the test substrate formed via the second optical member and the extraction unit; and at least one polarization correcting member disposed within a light path extending between the
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: December 11, 2007
    Assignee: Nikon Corporation
    Inventors: Takeo Oomori, Hideo Hirose, Yasuharu Nakajima, Kenzo Chiaki, Tatsumi Satou
  • Publication number: 20050280806
    Abstract: A surface inspection apparatus includes: a light source unit that emits a divergent light flux of predetermined linearly polarized light to be used to illuminate a test substrate; a first optical member that allows the divergent light flux of the predetermined linearly polarized light to enter therein with a predetermined angle of incidence and then guides a light flux to the test substrate; a second optical member that allows a light flux from the test substrate to enter therein, emits a convergent light flux thereof with a predetermined angle of emergence and forms an image at a specific surface; an extraction unit that extracts linearly polarized light in the convergent light flux from the second optical member, which is perpendicular to the predetermined linearly polarized light; a light-receiving unit that receives an image of the test substrate formed via the second optical member and the extraction unit; and at least one polarization correcting member disposed within a light path extending between the
    Type: Application
    Filed: June 13, 2005
    Publication date: December 22, 2005
    Applicant: NIKON CORPORATION
    Inventors: Takeo Oomori, Hideo Hirose, Yasuharu Nakajima, Kenzo Chiaki, Tatsumi Satou
  • Patent number: 6275121
    Abstract: A microwave phase shifter includes bias regulating circuits generating a gate bias of an FET switch element by processing a control voltage generated by the power-source voltage of an external system and applied to the FET switch element in a transformation process. The off-level of the gate bias is set near the pinch-off voltage. As a result, even when the control voltage of the FET switch element which switches the phase shift amount is restricted due to the circumstance of the system power-source, the off-level of the FET element can be set at a potential near the pinch-off voltage and can suppress delay in the rise of the phase shifter output because the off-level exceeds the pinch-off voltage.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: August 14, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshinobu Sasaki, Yasuharu Nakajima, Takaya Maruyama
  • Patent number: 6043713
    Abstract: An amplifier with a temperature compensation function featuring a simple configuration wherein a high frequency signal attenuation circuit is connected to a gate terminal of an amplifying active device. The high frequency signal attenuation circuit uses the source terminal and the drain terminal of a compensating active device as input and output terminals, and the gate terminal is grounded.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: March 28, 2000
    Assignee: Mitsuhishi Denki Kabushiki Kaisha
    Inventors: Shin Chaki, Yasuharu Nakajima
  • Patent number: 5990747
    Abstract: The present invention provides a high frequency amplifier circuit and a microwave integrated circuit which allow easy development of various models having different operating frequencies and other properties and improve the yield of production.The high frequency amplifier circuit of the present invention comprises a high frequency transistor and a matching circuit connected between a terminal of the transistor and an external connection terminal, whereinthe matching circuit has a variable capacitive element of which one end is connected to a terminal of the transistor and the other end is connected to the external connection terminal, and a short stub of which one end is connected to the other end of the variable capacitive element and the other end is directly grounded.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: November 23, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shin Chaki, Yasuharu Nakajima
  • Patent number: 5905384
    Abstract: An apparatus of testing a semiconductor element applies pulsed voltages synchronized with each other, respectively, to a gate and a drain of a semiconductor element being tested and measures current flowing through the semiconductor element in response to the pulsed voltages thus applied. The testing apparatus produces pulsed I-V characteristics considering the influences of self heating and surface energy levels of the semiconductor element and RF swing along a load line during large signal operation.
    Type: Grant
    Filed: January 6, 1997
    Date of Patent: May 18, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Inoue, Yasuharu Nakajima, Yukio Ohta, Hiroto Matsubayashi
  • Patent number: 5786627
    Abstract: An integrated circuit device includes a substrate, circuit elements on the substrate, and an electrically conductive thermoplastic resin substance electrically connecting the circuit elements on the substrate. Therefore, since variations in the configuration of the thermoplastic resin are quite small relative to those of interconnecting wires, variation in parasitic inductance due to variation in the configuration of the connections is reduced and the uniformity and the reproducibility of the high frequency characteristics of the integrated circuit device are enhanced. A method for fabricating an integrated circuit device includes forming circuit elements on a substrate and forming an electrically conducting thermoplastic resin substance electrically connecting the circuit elements.
    Type: Grant
    Filed: October 22, 1997
    Date of Patent: July 28, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Inoue, Kei Goto, Yoshihiro Notani, Yasuharu Nakajima, Hiroto Matsubayashi, Yukio Ohta
  • Patent number: 5767569
    Abstract: The method for mounting a semiconductor chip comprises disposing conductive thermoplastic polyimide as a bonding material between an inner lead of the TAB tape and an external connecting electrode of the semiconductor chip, applying pressure to the conductive thermoplastic polyimide by a wedge with heating by a hot stage via the semiconductor chip. The semiconductor chip comprises the external connecting electrode adhered the conductive thermoplastic polyimide. The method for fabricating the semiconductor chip comprises forming a signal line and a protective film, forming an electrode pad on the signal line not provided the protective film, forming a conductive thermoplastic polyimide layer on the semiconductor wafer by spin coating, forming a resist on the conductive thermoplastic polyimide layer and performing an etching with using the resist as a mask. The inner lead of the TAB tape is made of conductive thermoplastic polyimide, not gilded.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: June 16, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yukio Ohta, Kei Goto, Yoshihiro Notani, Yasuharu Nakajima, Akira Inoue, Hiroto Matubayashi
  • Patent number: 5675184
    Abstract: An integrated circuit device includes a substrate; circuit elements including an active element and a bias line for applying a DC bias voltage to the active element, disposed on the substrate; a thermoplastic material layer disposed on a region of the substrate; and a magnetic substance layer disposed on a region of the substrate including a region of the bias line, and adhered to and supported by the thermoplastic material layer. In this structure, the magnetic substance layer can be formed in an appropriate shape and at an appropriate position on the bias line according to the oscillation characteristics of the active element, such as a transistor, and the magnetic substance layer absorbs the frequency components of the oscillation of the active element, whereby oscillation of the active element is easily prevented.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: October 7, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroto Matsubayashi, Kei Goto, Yoshihiro Notani, Yukio Ohta, Akira Inoue, Yasuharu Nakajima
  • Patent number: 5426399
    Abstract: A film carrier signal transmission line includes a dielectric material having a first, front surface and a second, rear surface opposite the first surface, signal lines buried in the dielectric material for transmitting a super high frequency signal, spaced from the first and second surfaces, and spaced side-by-side at a regular interval; a first grounding film disposed on the second surface of the dielectric material; separating grooves in the dielectric material between adjacent pairs of signal lines, parallel to the signal lines; and second grounding films disposed on the first surface of the dielectric material and in the separating grooves and electrically connected with said first grounding film in the separating grooves. Adjacent signal lines are electrically shielded and crosstalk between signal lines is reduced.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: June 20, 1995
    Inventors: Hiroto Matsubayashi, Yasuharu Nakajima, Yoshihiro Notani
  • Patent number: 5412235
    Abstract: In a semiconductor integrated circuit, an amplifier FET and a gate bias FET, having the same structure as the amplifier FET and a total gate width smaller than that of the amplifier FET, are disposed close to each other. The gate bias FET is a constituent of a gate bias circuit for the amplifier FET, and the current determined by the drain current of the gate bias FET, first and second resistors respectively connected to drain and source of the gate bias FET, and a diode connected in series to the first resistor is applied to the amplifier FET as a gate bias voltage. In this structure, if the DC characteristic of the amplifier FET varies from chip to chip, the DC characteristic of the gate bias FET formed in the vicinity of and simultaneously with the amplifier FET also varies.
    Type: Grant
    Filed: January 27, 1994
    Date of Patent: May 2, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasuharu Nakajima, Hiroto Matsubayashi
  • Patent number: 5311324
    Abstract: An image reproduction apparatus with a plurality of disk players which concurrently perform play operation so as to produce a plurality of division video format signal concurrently. The video format signal are combined into a signal/final video format signal. The respective frame numbers extracted from the respective division video format signals are compared with the corresponding designated frame numbers. When the extracted frame number and the designated frame number do not coincide to each other, the corresponding division video format signal is ignored in the synthesis operation for producing the final video format signal.
    Type: Grant
    Filed: July 16, 1993
    Date of Patent: May 10, 1994
    Assignee: Pioneer Electronic Corporation
    Inventors: Tetsuya Temma, Yasuharu Nakajima, Hiroyasu Matsuura, Takeo Tobe, Jun Kono, Takuo Fujimura, Isao Kikuchi, Atsushi Takada
  • Patent number: 5260801
    Abstract: A video format signal recording and reproducing method wherein a plurality of division video signals are obtained by dividing a single video format signal and are recorded onto a plurality of recording media, set indication ID numbers are recorded. When the division video signals are reproduced from the recording media, the set indication ID numbers are automatically discriminated. Only when the set indication ID numbers coincide each other, the reproducing operation of the single video format signal is executed.
    Type: Grant
    Filed: May 28, 1991
    Date of Patent: November 9, 1993
    Assignee: Pioneer Electronic Corporation
    Inventors: Tetsuya Temma, Yasuharu Nakajima, Hiroyasu Matsuura, Takeo Tobe, Jun Kono, Takuo Fujimura, Isao Kikuchi, Atsushi Takada
  • Patent number: 5160907
    Abstract: A multiple layer semiconductor circuit module includes a semiconductor substrate including opposed first and second surfaces and side walls; a first circuit disposed on the first surface of the substrate including a plurality of conductors, at least one of the conductors extending on the first surface of the substrate to one of the side walls; a first electrically insulating layer disposed on the first surface of the substrate, covering the first circuit, and including a second surface adjacent to the first surface of the substrate, an opposed first surface, and side walls; a second circuit disposed on the first surface of the first layer including a plurality of conductors, at least one of the conductors extending on the first surface of the first layer to one of the side walls; a second electrically insulating layer disposed on the first surface of the first layer, covering the second circuit, and including a second surface adjacent to the first surface of the first layer, an opposed first surface, and side
    Type: Grant
    Filed: August 30, 1991
    Date of Patent: November 3, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasuharu Nakajima, Akira Inoue
  • Patent number: 5095357
    Abstract: Inductive structures having low parasitic capacitances for direct integration in semiconductor integrated circuits. In one embodiment, a generally planar spiral winding is disposed on the surface of a substrate. An electrical connection to the internal end of the spiral is made through electrically conducting vias passing through the substrate. The spiral may be spaced from a substrate surface by a plurality of spaced apart electrically conductive posts having a staggered arrangement between adjacent windings of the spiral. A transformer includes two windings disposed on top of each other on a semiconductor substrate and separated by an electrically insulating film. The windings have a common central opening in which a magnetic material is disposed to improve the inductive coupling between the windings.
    Type: Grant
    Filed: August 14, 1990
    Date of Patent: March 10, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Naoto Andoh, Akira Inoue, Yasuharu Nakajima, Kazuhiko Nakahara