Patents by Inventor Yasuharu Shimeki

Yasuharu Shimeki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4525753
    Abstract: In a magnetic recording/reproducing apparatus having a multi-track head for writing a digital signal on a magnetic recording medium, a plurality of head of the multi-track head is electrically divided into a plurality of groups which are respectively driven by writing currents produced in accordance with a plurality of modulated signals indicative of input digital data. The writing currents fed to the heads of the same group are produced in response to a pulse signal such that a plurality of pulse signals having different phases are used for respective groups. The head in the same group are positioned so that they are not adjacent to each other, and therefore, undesirable crosstalk can be reduced because heads corresponding to adjacent tracks are prevented from being driven simultaneously, while the entire writing current power can be reduced.
    Type: Grant
    Filed: May 26, 1983
    Date of Patent: June 25, 1985
    Assignee: Matsushita Electric Industrial Company, Limited
    Inventors: Yasuharu Shimeki, Misao Kato, Hiroshi Matsushima, Toshiro Ishikawa
  • Patent number: 4375100
    Abstract: Source data is organized by a time compression memory (4) into a plurality of successive groups of data words arranged in a pattern of rows and columns with the rows corresponding to respective recording tracks. A plurality of successive groups of parity check words is provided in the same pattern of rows and columns as the data words subsequent to the data word groups. Each parity check word is derived in a parity generator (6) by modulo-2 summations from the data words selected from different data word groups. The data and check words of each row of each respective group are (a) preceded by a synchronization code provided by a sync generator (10) to allow differentiation between data and parity groups, and (b) followed by a cyclic redundancy check, (CRC) code provided by a CRCC generator (9) to allow detection of an error in that data row or check words. The parity check word is used to correct an error specified by the CRC code upon detection of an error.
    Type: Grant
    Filed: October 23, 1980
    Date of Patent: February 22, 1983
    Assignee: Matsushita Electric Industrial Company, Limited
    Inventors: Shiro Tsuji, Hiroshi Matsushima, Yasuharu Shimeki, Nobuyoshi Kihara, Misao Kato
  • Patent number: 4302783
    Abstract: At least one bit of a digital signal including a plurality of bits to be simultaneously recorded on a plurality of tracks of a magnetic tape, is recorded on at least two tracks located at opposite sides with respect to a reference track. The reference track carries a reference signal utilized for producing a synchronous signal with which the plurality of bits are reproduced in synchronization. When reproducing, a.c. signals derived from the two corresponding tracks having the simultaneously recorded bits are added to each other whereby the phase difference of the plurality of bits with respect to the reference signal is compensated while drop out phenomenon is reduced.
    Type: Grant
    Filed: December 5, 1979
    Date of Patent: November 24, 1981
    Inventors: Soichiro Mima, Hiroshi Matsushima, Yasuharu Shimeki, Nobuyoshi Kihara
  • Patent number: 4146099
    Abstract: Signal recording method and apparatus for efficiently correcting a bit error due to dropout occurred in recording an analog data into a digital data and reproducing the digital data is disclosed. The digital signal converted from the analog signal is divided into a plurality of groups to each of which a parity check bit is added. Record pattern is recorded on a record medium by a recording apparatus in accordance with a regular coding such as FM (frequency modulation) or MFM (modified frequency modulation) coding such that more than one bits in a group are not simultaneously influenced by the dropout, e.g. individual bits in a group are spaced from each other by several tracks. On reproducing, the coded digital signal is decoded into the original digital signal and the dropout is detected utilizing the nature of the regularity of the coding. The parity is checked for each of the groups.
    Type: Grant
    Filed: August 11, 1977
    Date of Patent: March 27, 1979
    Assignee: Christopher Scientific Company
    Inventors: Hiroshi Matsushima, Yasuharu Shimeki, Nobuyoshi Kihara