Abstract: A measurement apparatus is provided that measures a current signal IDUT that flows through a device under test. A transimpedance amplifier converts the current signal IDUT into a voltage signal VOUT. A digitizer converts the voltage signal VOUT into digital data DOUT. A digital signal processing unit performs signal processing on the digital data DOUT, and controls the measurement apparatus. The measurement apparatus has a configuration comprising two separate modules, i.e., a probe module which is located in the vicinity of the device under test during a measurement, and a backend module connected to the probe module via at least one cable. The transimpedance amplifier is built into the probe module. The digitizer and the digital signal processing unit are built into the backend module.

Abstract: A measurement apparatus is provided that measures a current signal IDUT that flows through a device under test. A transimpedance amplifier converts the current signal IDUT into a voltage signal VOUT. A digitizer converts the voltage signal VOUT into first digital data. A digital signal processing unit performs signal processing on the first digital data, and controls the measurement apparatus. The measurement apparatus has a configuration comprising two separate modules, i.e., a probe module which is located in the vicinity of the device under test during a measurement, and a backend module connected to the probe module via at least one cable. The transimpedance amplifier is built into the probe module.

Abstract: A current measurement circuit converts a current signal IIN into a voltage signal VOUT. The current signal IIN is transmitted via a signal line. A shield line is arranged in the vicinity of at least a part of the signal line. A non-inverting amplifier includes an operational amplifier, and the current signal IIN is input to its non-inverting input terminal. The output signal of the non-inverting amplifier is input to its inverting input terminal as a feedback signal. An inverting amplifier amplifies the output signal of the non-inverting amplifier with inversion so as to generate a voltage signal VOUT. An impedance circuit includes a feedback resistor RF between the output terminal of the inverting amplifier and the non-inverting input terminal of the operational amplifier. A guard amplifier receives the electric potential at the inverting input terminal of the operational amplifier, and applies the electric potential to the shield line.

Abstract: A measurement apparatus is provided that measures a current signal IDUT that flows through a device under test. A transimpedance amplifier converts the current signal IDUT into a voltage signal VOUT. A digitizer converts the voltage signal VOUT into first digital data. A digital signal processing unit performs signal processing on the first digital data, and controls the measurement apparatus. The measurement apparatus has a configuration comprising two separate modules, i.e., a probe module which is located in the vicinity of the device under test during a measurement, and a backend module connected to the probe module via at least one cable. The transimpedance amplifier is built into the probe module.

Abstract: A measurement apparatus is provided that measures a current signal IDUT that flows through a device under test. A transimpedance amplifier converts the current signal IDUT into a voltage signal VOUT. A digitizer converts the voltage signal VOUT into digital data DOUT. A digital signal processing unit performs signal processing on the digital data DOUT, and controls the measurement apparatus. The measurement apparatus has a configuration comprising two separate modules, i.e., a probe module which is located in the vicinity of the device under test during a measurement, and a backend module connected to the probe module via at least one cable. The transimpedance amplifier is built into the probe module. The digitizer and the digital signal processing unit are built into the backend module.

Abstract: A current measurement circuit converts a current signal IIN into a voltage signal VOUT. The current signal IIN is transmitted via a signal line. A shield line is arranged in the vicinity of at least a part of the signal line. A non-inverting amplifier includes an operational amplifier, and the current signal IIN is input to its non-inverting input terminal. The output signal of the non-inverting amplifier is input to its inverting input terminal as a feedback signal. An inverting amplifier amplifies the output signal of the non-inverting amplifier with inversion so as to generate a voltage signal VOUT. An impedance circuit includes a feedback resistor RF between the output terminal of the inverting amplifier and the non-inverting input terminal of the operational amplifier. A guard amplifier receives the electric potential at the inverting input terminal of the operational amplifier, and applies the electric potential to the shield line.

Abstract: To decrease the burden of digital processing, provided is an AD conversion apparatus comprising a pattern generating section that, for each target bit specified one bit at a time moving downward in the output data, generates a pattern signal having a pulse width or number of pulses corresponding to a weighting of the target bit; an integrating section that integrates the pattern signals according to a judgment value for judging a value of the target bit each time a pattern signal is generated, and outputs a reference signal obtained by accumulating the integrated value of each pattern signal; a comparing section that, each time generation of a pattern signal is finished, compares the input signal to the reference signal; and an output section that outputs the output data to have values corresponding to the comparison results obtained after each generation of a pattern signal corresponding to a bit is finished.

Abstract: A DA conversion apparatus comprising a DA converting section that includes a plurality of analog elements; and a control section that generates first shift data and second shift data by shifting the input digital data by respective shift amounts of M bits and N bits, and controls the analog elements based on the first shift data and the second shift data, wherein the control section changes a control state for each of the common analog elements according to the bit shift amounts M and N in the control section, between at least two control states including a control state in which the common analog element is controlled according to higher-order bits of the first shift data and a control state in which the common analog element is controlled according higher-order bits of the second shift data.

Abstract: To decrease the burden of digital processing, provided is an AD conversion apparatus comprising a pattern generating section that, for each target bit specified one bit at a time moving downward in the output data, generates a pattern signal having a pulse width or number of pulses corresponding to a weighting of the target bit; an integrating section that integrates the pattern signals according to a judgment value for judging a value of the target bit each time a pattern signal is generated, and outputs a reference signal obtained by accumulating the integrated value of each pattern signal; a comparing section that, each time generation of a pattern signal is finished, compares the input signal to the reference signal; and an output section that outputs the output data to have values corresponding to the comparison results obtained after each generation of a pattern signal corresponding to a bit is finished.

Abstract: To decrease the burden of digital processing, provided is an AD conversion apparatus comprising a pattern generating section that, for each target bit specified one bit at a time moving downward in the output data, generates a pattern signal having a pulse width or number of pulses corresponding to a weighting of the target bit; an integrating section that integrates the pattern signals according to a judgment value for judging a value of the target bit each time a pattern signal is generated, and outputs a reference signal obtained by accumulating the integrated value of each pattern signal; a comparing section that, each time generation of a pattern signal is finished, compares the input signal to the reference signal; and an output section that outputs the output data to have values corresponding to the comparison results obtained after each generation of a pattern signal corresponding to a bit is finished.

Abstract: A sampling apparatus that converts an analog target signal in which the same waveform repeats into a digital value by sampling the target signal at each of a plurality of phases, and outputs the digital value. The sampling apparatus comprises a designating section that sequentially designates bits in the digital value as target bits, beginning with the most significant bits; a generating section that, for each designated target bit, generates a threshold value for determining a value of the target bit based on a determined value of a bit that is higher-order than the target bit in the digital value at each of the phases; and a converting section that, for each designated target bit, determines the value of the target bit in the digital value at each phase by comparing the target signal to an analog comparison signal corresponding to the threshold value at each phase.

Abstract: Provided is an output apparatus comprising a plurality of current sources; a plurality of holding sections that correspond respectively to the current sources and that each hold a designated voltage that designates a current flowing through the corresponding current source; a setting DAC that sequentially generates the designated voltage to be held by each holding section; and a supply section that sequentially switches a supply of the designated voltage generated by the setting DAC among corresponding holding sections.

Abstract: Provided is a test apparatus that tests a device under test. The device under test includes: a circuit under test; and a switching section that that connects an internal terminal being tested, from among one or more internal terminals of the circuit under test, to external terminals connected to the test apparatus.

Abstract: Provided is a signal generating apparatus comprising a DA converter that outputs an output signal corresponding to input data supplied thereto; a sample/hold unit that is provided between the DA converter and an output end of the signal generating apparatus, and that samples an output voltage of the DA converter and holds the sampled output voltage; a comparing section that compares (i) a level of a signal output from an analog circuit that propagates the output signal to output a signal corresponding to the input data to (ii) a level of the signal output by the DA converter; and a control section that, during a holding period, (iii) provides the DA converter with comparison data instead of the input data to cause the DA converter to output a comparison voltage corresponding to the comparison data, (iv) causes the comparing section to compare a voltage of the signal output by the analog circuit to the comparison voltage, and (v) adjusts the output voltage of the DA converter based on a comparison result of th

Abstract: Provided is a signal generating apparatus comprising a DA converter that outputs an output signal corresponding to input data supplied thereto; a sample/hold unit that is provided between the DA converter and an output end of the signal generating apparatus, and that samples an output voltage of the DA converter and holds the sampled output voltage; a comparing section that compares (i) a level of a signal output from an analog circuit that propagates the output signal to output a signal corresponding to the input data to (ii) a level of the signal output by the DA converter; and a control section that, during a holding period, (iii) provides the DA converter with comparison data instead of the input data to cause the DA converter to output a comparison voltage corresponding to the comparison data, (iv) causes the comparing section to compare a voltage of the signal output by the analog circuit to the comparison voltage, and (v) adjusts the output voltage of the DA converter according to the input data based

Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a pulse generator for outputting a pulse signal having a pulse width set in advance corresponding to edges-under-measurement from which the timing jitter is to be measured in the signal-under-measurement, a filter for removing carrier frequency components of the signal-under-measurement from the pulse signal and a jitter calculator for calculating the jitter in the signal-under-measurement based on the signal outputted out of the filter.

Abstract: Provided is an AD conversion apparatus including: a differential amplifier that generates a differential input voltage according to an analog input signal; a differential DA converter of a charge redistribution type, which outputs a differential output voltage resulting from subtracting the differential input voltage from a differential comparison voltage that is in accordance with comparison data; a comparator that compares a positive output voltage and a negative output voltage in the differential output voltage; a control section that identifies the comparison data at which the differential output voltage becomes substantially 0 based on a comparison result of the comparator, and outputs the identified comparison data as output data; and a setting section that sets at least one of a common potential of the differential amplifier and a common potential of the differential DA converter, according to a targeted value of a common potential of the comparator

Abstract: Provided is a DA conversion apparatus comprising a capacitor array DA converter that outputs to an output line an output voltage corresponding to a digital value input thereto; and a load changing section that changes a size of a load capacitance connected to the output line. The load changing section may set gain of the DA conversion apparatus with the size of the load capacitance connected to the output line being a constant capacitance unaffected by the digital value. The load changing section may include a load capacitor connected between the output line and a standard potential; a load-side switch connected in series with the load capacitor between the output line and the standard potential; and a load capacitance control section that controls the load-side switch.

Abstract: Provided is an output apparatus comprising a plurality of current sources; a plurality of holding sections that correspond respectively to the current sources and that each hold a designated voltage that designates a current flowing through the corresponding current source; a setting DAC that sequentially generates the designated voltage to be held by each holding section; and a supply section that sequentially switches a supply of the designated voltage generated by the setting DAC among corresponding holding sections.

Abstract: Provided is a measurement apparatus that measures a signal under measurement input thereto, comprising a plurality of signal measurement circuits that measure a level of a signal input thereto, according to a sampling clock provided thereto; a noise measuring section that measures a noise component propagated from a first signal measurement circuit to a second signal measurement circuit, among the plurality of signal measurement circuits, based on a measurement result output by the second signal measurement circuit; and a clock supplying section that, when the signal under measurement is being measured, supplies the first signal measurement circuit and the second signal measurement circuit with sampling clocks having the same period and that, when the noise component is being measured, supplies the first signal measurement circuit and the second signal measurement circuit with sampling clocks having different periods.