Patents by Inventor Yasuhiko Matuyama

Yasuhiko Matuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6642702
    Abstract: A detection circuit for a maximum amplitude value of a 3-phase signal wherein the three phase-signals having a phase difference of 120° from each other is converted to sampling data of digital values by an A/D converter circuit in every sampling period properly decided, and after that, when the coincidence of the values of any two phase-signals among three phase-signals is detected, the value of the remaining one phase-signal is taken as the maximum amplitude value. Thereby, an accurate maximum amplitude value can be obtained.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: November 4, 2003
    Assignee: Sony Corporation
    Inventor: Yasuhiko Matuyama
  • Patent number: 6340908
    Abstract: A phase adjusting circuit including an input level adjuster using two detection signals having different phases and adjusting an amplitude of at least one detection signal to a predetermined level and a signal processor for signal processing including at least one of addition and subtraction on the two detection signals after level adjustment to generate a pair of output signals having a phase difference of 90 degrees or a single output signal having a phase difference of 90 degrees with respect to one of the detection signals, and a position measuring apparatus including an output level adjuster, a scaling signal generator, a detector, an A/D converter, and a memory in addition, wherein the position measuring apparatus cancels a phase error so that a signal having a phase difference of 90 degrees can be obtained.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: January 22, 2002
    Assignee: Sony Corporation
    Inventor: Yasuhiko Matuyama
  • Patent number: 5663643
    Abstract: A position detecting apparatus for a scale measuring system executes a offset correction of the detected three-phase signals A, B and C by using the arithmetic mean (A+B+C)/3 as an offset value. Further, the apparatus executes a gain correction of the offset corrected signals by using a gain which is obtained by the calculation of a square-root of {A.sup.2 +(B-C).sup.2 /3}. Therefore, the accurate measurement is executed by this apparatus even if the gain level is changed at a turn-on of an electric source of this apparatus.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: September 2, 1997
    Assignee: Sony Magnescale Inc.
    Inventor: Yasuhiko Matuyama
  • Patent number: 5485407
    Abstract: An interpolation device for a scale arrangement receives sine wave and cosine wave signals indicative of a measuring data from the scale arrangement and calculates a DC offset value, an amplitude coefficient and an amount of a phase drift on the basis of the received signals. The interpolation device outputs a correct angle signal upon removing a DC offset, a gain level error, a gain unbalance and a phase drift from received signals. Therefore, the interpolation device realizes a mechanical structure of the scale arrangement to be simple.
    Type: Grant
    Filed: November 16, 1993
    Date of Patent: January 16, 1996
    Assignee: Sony Magnescale Inc.
    Inventors: Shigeru Ishimoto, Yasuhiko Matuyama, Hideo Maejima