Abstract: A nonwoven sheet contains a substrate layer formed from a fiber aggregate nonwoven structural member; the fiber aggregate nonwoven structural member containing a thermal adhesive fiber; the thermal adhesive fibers are melt-bonded to fix the fibers of the member. The average thickness of the substrate layer is adjusted to not less than 0.2 mm to less than 1 mm, and the thermal adhesive fibers are substantially uniformly melt-bonded in a surface direction of the substrate layer. The sheet may have a surface layer over at least one side of the substrate layer, the surface layer may contain a fiber aggregate nonwoven structural member having an apparent density higher than the apparent density of the substrate layer. The surface layer may comprise a layer formed by heat-pressing or may be formed from a meltblown nonwoven fabric. The thermal adhesive fiber may be substantially uniformly melt-bonded in a thickness direction of the substrate layer.

Abstract: A PLL clock signal generation circuit comprising a phase comparator, a charge pump circuit, a filter circuit, a voltage control oscillator and a divider, wherein a multiple rate control circuit is further included which detects a state of the reference voltage (output from a filter circuit) and controls a change of a multiple rate of a divider according to a state of the detected reference voltage. The multiple rate control circuit further outputs control signal LPFOUT for changing a multiple rate so that the PLL clock signal generation circuit does not deviate from a region capable of locking when being detected of deviation from the region capable of locking by detecting the state of reference voltage.

Abstract: An improvement in the production of imidazole derivatives including histamine H3 agonist immepip and histamine H3 antagonist VUF4929.

Abstract: A PLL clock signal generation circuit comprising a phase comparator, a charge pump circuit, a filter circuit, a voltage control oscillator and a divider, wherein a multiple rate control circuit is further included which detects a state of the reference voltage (output from a filter circuit) and controls a change of a multiple rate of a divider according to a state of the detected reference voltage. The multiple rate control circuit further outputs control signal LPFOUT for changing a multiple rate so that the PLL clock signal generation circuit does not deviate from a region capable of locking when being detected of deviation from the region capable of locking by detecting the state of reference voltage.

Abstract: An improvement in the production of imidazole derivatives including histamine H3 agonist immepip and histamine H3 antagonist VUF4929. Desired imidazole derivatives can be easily obtained in high yield by using novel intermediates represented by the general formula (I): (I) wherein R1 is an amino-protecting group; R2 and R3 are each independently hydrogen, lower alkyl, or hydroxylated lower alkyl; R4 is lower alkyl, halogenated lower alkyl, or substituted or unsubstituted phenyl; and A is C1-3 alkylene.

Abstract: A process for advantageously preparing a piperazinesulfonamide derivative represented by the general formula (III): wherein R1 is hydrogen atom, a straight or branched chain alkyl group having 1 to 6 carbon atoms, an alkoxy group having 1 to 4 carbon atoms, a halogen atom, hydroxyl group, trifluoromethyl group, nitro group or amino group; R2 is a phenyl group which may have as substituents on its phenyl ring 1 to 3 groups selected from the group consisting of an alkyl group having 1 to 4 carbon atoms, an alkoxy group having 1 to 4 carbon atoms, a halogen atom, hydroxyl group, trifluoromethyl group, nitro group and amino group, 2-pyridyl group, 3-pyridyl group or 4-pyridyl group; each of R3 and R4 is independently hydrogen atom, a straight or branched chain alkyl group having 1 to 6 carbon atoms, a hydroxyalkyl group having 1 to 4 carbon atoms, a cycloalkyl group having 3 to 8 carbon atoms, or a phenyl group which may be substituted; and Y is an alkylene group having 1 to 12 carbon atoms, and

Abstract: A writing circuit for a nonvolatile memory has eight circuit units for bit parallel processing. Each circuit unit has 16 first D flip-flops for address 0 to address F, and one second D flip-flop. The eight circuit units hold in their own 16 first D flip-flops write data of 8 bits fed in bit parallel fashion with respect to each of the 16 addresses. The totally eight second D flip-flops simultaneously hold 8 bits of verify data read from memory cells in bit parallel fashion. In verify operation, in each of the eight circuit units, the write data held in the first D flip-flops are given 16 address attributes, respectively, and compared with the verify data held by the second D flip-flop in an address sequence of the 16 address attributes to make sure of coincidence between the data.

Abstract: A diazacycloalkanealkylsulfonamide derivative having the following formula ?I!: ##STR1## and pharmacologically acceptable salts thereof. The compounds have antiallergic activity with low antihistaminic activity and low toxicity and are useful as an medicament for preventing and treating diseases such as bronchial asthma, allergic rhinitis, atopic dermatitis, urticaria.

Abstract: An OTP microcomputer of the present invention includes: a PROM 14 having a terminal for receiving signals from a voltage supply Vpp that allows a program to be written therein; a MOS transistor to be used as a resistance or a resistance cable containing a pull-up resistance R4, and an input terminal 11 connected to both the terminal of the PROM and a logic circuit of the microcomputer and connected with the drain of the MOS transistor or one end of the resistance R4. In this arrangement, when a microcomputer mode in which the OTP microcomputer is operated as a normal microcomputer is selected, a voltage Vcc (.vertline.Vpp.vertline.>.vertline.Vcc.vertline.) of a device power supply provided inside the circuit of the microcomputer is supplied to the source of the MOS transistor or the other end of the resistance R4.

Abstract: By using an EIP source lock counter, a frequency of a Gunn oscillator is stabilized. This increases the frequency stability of a circuit. An oscillation output of the Gunn Oscillator is supplied to the EIP source lock counter, and a phase lock signal indicative of a phase shift of the oscillation frequency from the EIP source lock counter relative to a preset reference frequency is supplied to a driver circuit. The driver circuit includes level shift circuit which level-shifts the phase lock signal thereof. A phase compensation circuit in the driver circuit boosts a gain as well as advances a phase at a high frequency region. The current amplifier circuit amplifies a current amplitude of the output of the level shift circuit, and the amplified output therefrom controls an oscillation frequency of the Gunn oscillator using negative feedback.

Abstract: Novel 3-aminocarbonyl-1,4-dihydropyridine-5-carboxylic acid compounds of the formula: ##STR1## wherein R.sup.1 is H, C.sub.1-5 alkyl, C.sub.2-5 alkenyl, C.sub.3.5 alkynyl, C.sub.3-8 cycloalkyl, R.sup.2 is C.sub.1-10 alkyl, and the NO.sub.2 group is substituted at ortho- or meta-position, provided that when the NO.sub.2 group is substituted at ortho-position and R.sup.2 is methyl, R.sup.1 is C.sub.3-5 alkyl, C.sub.2-5 alkenyl, C.sub.3-5 alkynyl, or C.sub.3-8 cycloalkyl, and when the NO.sub.2 group is substituted at meta-position and R.sup.1 is H, R.sup.2 is C.sub.3-10 alkyl, which have excellent hypotensive, vasodilating activities and are useful for the prophylaxis and treatment of hypertension, ischemic heart diseases and cerebral and peripheral circulation diseases.

Abstract: A faulty-memory processing method and apparatus in a data processing system which executes a time-sharing data process with breaks. Hard error which may exist in a cell in a normal memory is detected by using an error correction circuit. After correcting an error in information read out from a detected hard-error cell in the normal memory, information including the above corrected information with respect to the detected hard-error cell is transcribed into a relief memory. The above correction and transcription is executed during the breaks in the time-sharing data process.

Abstract: In the receiving terminal of a PCM (Pulse Code Modulation)-TDMA (Time Division Multiple Access) system, a data is demodulated from a received burst signal, said data is written in a buffer register by using a burst clock which is regenerated from the received burst signal. The content of said buffer register is read by using a local clock which is generated in the receiving office and, after the data is read out, said data is controlled by said local clock.

Abstract: An acquisition system for the SDMA/TDMA satellite communication system is disclosed in which a synchronization signal receiving time slot and a plurality of data signal receiving time slots, for communication between predetermined groups of earth stations and between the earth stations of each group, are sequentially provided at the satellite based on timing signal in the satellite. An acquisition signal having a plurality of signal burst portions is transmitted from the earth station, with its transmit time slot being shifted in a first sweep mode until one part of the acquisition signal is received by said transmitting earth station. At that time the transmit time slot is shifted in a second sweep mode, whereby a control is made to obtain synchronization of the earth station with the satellite so that the plurality of burst portions in the acquisition signal may be properly communicated to the predetermined groups.