Abstract: A pulse wave detector includes: a base portion; a pulse wave sensor that is provided on a side of one surface of the base portion; and a pressure adjusting portion that adjusts pressure for pressing the pulse wave sensor in a direction in which the one surface of the base portion faces.

Abstract: An electronic blood pressure monitor includes: a vibration sensor that includes a film shape, the vibration sensor detecting vibrations of a body surface, the vibration sensor converting the detected vibrations to an electrical signal corresponding to pressure generated in a thickness direction of the vibration sensor to output the electrical signal; and a stethoscope filter that passes a signal of a first predetermined frequency band among the output electrical signal, the first predetermined frequency band being determined based on a frequency characteristic of a stethoscope.

Abstract: A current sensor includes an element substrate that has a first surface facing a wire to which electric current to be measured is supplied and a second surface positioned on the opposite side of the first surface; a pair of sloping surfaces that are formed mutually juxtaposed in the element substrate so as to have slope angles by which their mutual spacing gradually decreases in a first direction approximately orthogonal with the first surface heading from the first surface to the second surface; a pair of magnetism detecting elements that are respectively attached to the pair of sloping surfaces formed in the element substrate; and external connection terminals that are respectively connected to the pair of magnetism detecting elements and that extend in a second direction that is the opposite direction of the first direction, in which the sensitivity directions of the pair of magnetism detecting elements are respectively set so as to slope along the pair of sloping surfaces.

Abstract: A current detection circuit includes a coil that is constituted by a metal wiring formed on a semiconductor substrate, a resistor that is provided in a position near the coil on the semiconductor substrate, constituted by a metal wiring formed on the semiconductor substrate, which is made of a metal material being same as that of the coil, and arranged so as to prevent any magnetic field from being generated due to a current flowing in the resistor, an output circuit that outputs currents in accordance with a resistance ratio between the coil and the resistor to the coil and the resistor correspondingly through a common terminal, and a detection circuit that detects the current flowing in the resistor to thereby detect the current flowing in the coil.

Abstract: A current detection circuit includes a coil that is constituted by a metal wiring formed on a semiconductor substrate, a resistor that is provided in a position near the coil on the semiconductor substrate, constituted by a metal wiring formed on the semiconductor substrate, which is made of a metal material being same as that of the coil, and arranged so as to prevent any magnetic field from being generated due to a current flowing in the resistor, an output circuit that outputs currents in accordance with a resistance ratio between the coil and the resistor to the coil and the resistor correspondingly through a common terminal, and a detection circuit that detects the current flowing in the resistor to thereby detect the current flowing in the coil.

Abstract: A current sensor includes an element substrate that has a first surface facing a wire to which electric current to be measured is supplied and a second surface positioned on the opposite side of the first surface; a pair of sloping surfaces that are formed mutually juxtaposed in the element substrate so as to have slope angles by which their mutual spacing gradually decreases in a first direction approximately orthogonal with the first surface heading from the first surface to the second surface; a pair of magnetism detecting elements that are respectively attached to the pair of sloping surfaces formed in the element substrate; and external connection terminals that are respectively connected to the pair of magnetism detecting elements and that extend in a second direction that is the opposite direction of the first direction, in which the sensitivity directions of the pair of magnetism detecting elements are respectively set so as to slope along the pair of sloping surfaces.

Abstract: A semiconductor device comprises a semiconductor substrate having first and second active regions of first conductivity type, first and second insulated electrodes crossing the first and second active regions, respectively, a third insulated electrode formed on the second insulated electrode, source/drain regions formed on both sides of the first electrode, pseudo source/drain regions formed on both sides of the second electrode, first and second power source lines formed above the second active region through an interlevel insulating layer, a first interconnection connecting the third electrode and the pseudo source/drain regions to the first power source line, and a second interconnection connecting the second electrode to the second power source line, wherein the first active region constitutes a MOS transistor and the second active region constitutes a bypass capacitor and induces an inversion layer of the second conductivity type under the second electrode structure when the power source lines are activa

Abstract: A duty ratio correction circuit includes: a first switching amplifier circuit into which an input pulse signal is input; a current control device connected with the switching device for controlling a current in accordance with a bias voltage signal; a waveform shaping circuit that correct an output of the first switching amplifier circuit; a first integration circuit that integrates a corrected output; a reference voltage setting unit that sets a reference voltage signal defining a duty ratio; a comparator circuit that compares an output of the first integration circuit with the reference voltage signal; a second switching amplifier circuit that includes a switching device connected in series with a constant current circuit, the switching device using a comparison judgment signal as a gate signal; and a second integration circuit that integrates an output of the second switching amplifier circuit and outputs the bias voltage signal.

Abstract: A plurality of pulses each having relatively low energy are consecutively applied to a subject fuse to cause breakdown, wherein the total energy of pulses is set in light of a prescribed breakdown threshold, which is calculated in advance. The subject fuse has a pair of terminals and an interconnection portion that is narrowly constricted in the middle so as to realize fuse breakdown with ease. A pulse generator generates pulses, which are repeatedly applied to the subject fuse by way of a transistor; then, it stops generating pulses upon detection of fuse breakdown. Side wall spacers are formed on side walls of fuses, which are processed in a tapered shape so as to reduce thermal stress applied to coating insulating films. In addition, pulse energy is appropriately determined so as to cause electro-migration in the subject fuse, which is thus increased in resistance without causing instantaneous meltdown or evaporation.

Abstract: A duty ratio correction circuit includes: a first switching amplifier circuit into which an input pulse signal is input; a current control device connected with the switching device for controlling a current in accordance with a bias voltage signal; a waveform shaping circuit that correct an output of the first switching amplifier circuit; a first integration circuit that integrates a corrected output; a reference voltage setting unit that sets a reference voltage signal defining a duty ratio; a comparator circuit that compares an output of the first integration circuit with the reference voltage signal; a second switching amplifier circuit that includes a switching device connected in series with a constant current circuit, the switching device using a comparison judgment signal as a gate signal; and a second integration circuit that integrates an output of the second switching amplifier circuit and outputs the bias voltage signal.

Abstract: A low-pass filter eliminates a high-frequency component contained in an input signal. An inverter outputs a signal at a high level or a low level in response to an output of the low-pass filter that is larger or smaller than a threshold level. A one-shot pulse generating circuit outputs a pulse signal at a point of time when an output level of the inverter is changed. FETs receive the pulse signal output from the one-shot pulse generating circuit, and pulls in forcedly the output of the low-pass filter to the high level or the low level. According to this pulling-in operation, generation of the noise at an output terminal can be prevented.

Abstract: An oscillation detection circuit is constituted by at least one circuitry comprising a first current source for charging a capacitor and a second current source for discharging the capacitor, which are connected in series via a switch controlled to be opened or closed in response to an output signal of an oscillation circuit, wherein the first current source is greater than the second current source in current value. Herein, a signal emerging at a connection point of the first and second current sources is integrated as the switch is repeatedly turned on and off in response to the oscillation signal whose level is periodically changed in an oscillation mode. A Schmitt trigger is arranged to produce a detection signal based on the signal at the connection point between the first and second current sources.

Abstract: An input signal (SIN) is inverted by an inverter (101), and the inverted input signal is entered into a tri-state type inverter (104). An output portion of this inverter is connected via a delay path (105) to an input portion of an operational amplifier (106). This operational amplifier owns a hysteresis characteristic with respect to a signal entered thereinto. An exclusive-OR gate circuit (103) controls to set the output state of the inverter to a low impedance state upon receipt of a signal (S11) obtained by inverting the input signal, and controls to set the output state of the inverter to a high impedance state upon receipt of a signal (S16) output from the operational amplifier. As a result, an amplitude of a signal (S15) is limited to a constant amplitude in response to the hysteresis characteristic of the operational amplifier (106), and a delay time is made constant.

Abstract: A semiconductor device comprises a semiconductor substrate having first and second active regions of first conductivity type, first and second insulated electrodes crossing the first and second active regions, respectively, a third insulated electrode formed on the second insulated electrode, source/drain regions formed on both sides of the first electrode, pseudo source/drain regions formed on both sides of the second electrode, first and second power source lines formed above the second active region through an interlevel insulating layer, a first interconnection connecting the third electrode and the pseudo source/drain regions to the first power source line, and a second interconnection connecting the second electrode to the second power source line, wherein the first active region constitutes a MOS transistor and the second active region constitutes a bypass capacitor and induces an inversion layer of the second conductivity type under the second electrode structure when the power source lines are activa

Abstract: A low-pass filter eliminates a high-frequency component contained in an input signal. An inverter outputs a signal at a high level or a low level in response to an output of the low-pass filter that is larger or smaller than a threshold level. A one-shot pulse generating circuit outputs a pulse signal at a point of time when an output level of the inverter is changed. FETs receive the pulse signal output from the one-shot pulse generating circuit, and pulls in forcedly the output of the low-pass filter to the high level or the low level. According to this pulling-in operation, generation of the noise at an output terminal can be prevented.

Abstract: A crystal oscillation circuit using a crystal oscillator comprises an inverting amplifier, a buffer, and a voltage shift circuit. The voltage shift circuit operates in such a way that within prescribed limits by which the output of the inverting amplifier satisfies excitation conditions of the crystal oscillator and by which the oscillation output of the buffer satisfies input conditions of a following circuit, a supply voltage (Vdd) is reduced by a gate threshold voltage of an n-channel MOS transistor, and a ground potential (GND) is increased by a gate threshold voltage of a p-channel MOS transistor with respect to both the inverting amplifier and the buffer. Thus, it is possible to prevent the crystal oscillator from being damaged while suppressing the excitation level of the crystal oscillator even though the gain of the inverting amplifier is increased to be relatively high.

Abstract: A class D amplifier includes: an integrating circuit (1) which integrates an input signal; a flash A/D converter (2) which A/D converts an output signal of the integrating circuit; a waveform converting circuit (3) which produces a PWM signal based on an output of the flash A/D converter; a switching circuit which is includes a pair of MOS transistors (5, 6) connected between a first power source and a second power source, the junction point P of the pair of MOS transistors being connected to a loudspeaker (51); a driving circuit (4) which drives the pair of MOS transistors on the basis of the PWM signal; and a feedback resistor (RNF) which is connected between the junction point P and the input side of the integrating circuit, and negatively feeds back the output signal of the amplifier.

Abstract: An input signal (SIN) is inverted by an inverter (101), and the inverted input signal is entered into a tri-state type inverter (104). An output portion of this inverter is connected via a delay path (105) to an input portion of an operational amplifier (106). This operational amplifier owns a hysteresis characteristic with respect to a signal entered thereinto. An exclusive-OR gate circuit (103) controls to set the output state of the inverter to a low impedance state upon receipt of a signal (S11) obtained by inverting the input signal, and controls to set the output state of the inverter to a high impedance state upon receipt of a signal (S16) output from the operational amplifier. As a result, an amplitude of a signal (S15) is limited to a constant amplitude in response to the hysteresis characteristic of the operational amplifier (106), and a delay time is made constant.

Abstract: An oscillation detection circuit is constituted by at least one circuitry comprising a first current source for charging a capacitor and a second current source for discharging the capacitor, which are connected in series via a switch controlled to be opened or closed in response to an output signal of an oscillation circuit, wherein the first current source is greater than the second current source in current value. Herein, a signal emerging at a connection point of the first and second current sources is integrated as the switch is repeatedly turned on and off in response to the oscillation signal whose level is periodically changed in an oscillation mode. A Schmitt trigger is arranged to produce a detection signal based on the signal at the connection point between the first and second current sources.

Abstract: A power-on/off reset circuit comprises a capacitor, a first transistor, a second transistor, a first current mirror circuit, a second current mirror circuit, and an inverter. In a power-on mode where the source voltage gradually increases in level, the capacitor is charged via the first transistor. The first current mirror circuit comprising a pair of transistors allows a current to flow therein in proportion to a potential of the capacitor. The second transistor converts the current to a voltage, which is input to the inverter to provide a first reset signal in the power-on mode. In a power-off mode where the source voltage gradually decreases in level, the second current mirror circuit comprising a pair of transistors temporarily increases the input voltage of the inverter to provide a second reset signal.