Patents by Inventor Yasuhiko Sueyoshi

Yasuhiko Sueyoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110159632
    Abstract: The deposition temperature of the HDP film can be controlled to 365° C. or below, preferably within a temperature range of 335° C. to 365° C., and more preferably 335° C. to 350° C., or at 350° C. Thus, it becomes possible to suppress signal deterioration due to dark current and an increase in fine white defects, and to prevent deterioration of picture quality, even when the HDP film with a favorable embedding capability between fine wiring is used as an interlayer insulation film. An RF power is set to 850 W to 1500 W, so that dark current can be suppressed even more. Further, a plasma silicon nitride film with a refractive index of 1.9 or more and 2.15 or less for a blue wavelength is formed, so that it becomes possible to suppress the lowering of a blue sensitivity in the light receiving elements to further improve picture quality.
    Type: Application
    Filed: December 13, 2010
    Publication date: June 30, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Yasuhiko Sueyoshi
  • Patent number: 6583059
    Abstract: A method of manufacturing a semiconductor device comprises the steps of: (a) forming a thermal oxide film on a surface of a silicon layer; (b) removing the thermal oxide film; and (c) forming a silicide film on the resulting surface of the silicon layer.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: June 24, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yasuhiko Sueyoshi
  • Patent number: 6566257
    Abstract: A semiconductor device is produced by forming a gate electrode on a semiconductor substrate, and by then forming source/drain regions by an ion implantation using the gate electrode as a mask. A suicide film is formed on at least the surface of the gate electrode. In one aspect of the invention, the ion implantation is performed by controlling a tungsten dose in a range from 0 to 5×109 atom/cm2. In another aspect of the invention, the ion implantation is performed by controlling tungsten concentration in the gate electrode ion to fall in a range from 0 to 3×1014 atom/cm3.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: May 20, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yasuhiko Sueyoshi
  • Publication number: 20020072233
    Abstract: A method of manufacturing a semiconductor device comprises the steps of: (a) forming a thermal oxide film on a surface of a silicon layer; (b) removing the thermal oxide film; and (c) forming a silicide film on the resulting surface of the silicon layer.
    Type: Application
    Filed: September 24, 2001
    Publication date: June 13, 2002
    Inventor: Yasuhiko Sueyoshi
  • Publication number: 20010034101
    Abstract: A semiconductor device is produced by forming a gate electrode on a semiconductor substrate, and by then forming source/drain regions by an ion implantation using the gate electrode as a mask. A suicide film is formed on at least the surface of the gate electrode. In one aspect of the invention, the ion implantation is performed by controlling a tungsten dose in a range from 0 to 5×109 atom/cm2. In another aspect of the invention, the ion implantation is performed by controlling tungsten concentration in the gate electrode ion to fall in a range from 0 to 3×1014 atom/cm3.
    Type: Application
    Filed: March 20, 2001
    Publication date: October 25, 2001
    Inventor: Yasuhiko Sueyoshi