Patents by Inventor Yasuhiko Tomikawa

Yasuhiko Tomikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110215795
    Abstract: A detector obtains an output signal from an input signal containing a target signal and outputs the output signal. The detector includes an amplifier configured to receive the input signal and the output signal, compare the input signal to the output signal to output a comparison result; an envelope generator configured to weight a first value and a second value having a sign opposite to that of the first value in accordance with the comparison result, integrate the weighted first value and the weighted second value, and output an integration result as the output signal; and a controller configured to control the envelope generator in accordance with the input signal. The controller controls the envelope generator to mitigate an increase in an absolute value of the integration result when the input signal contains a frequency component other than a frequency component of the target signal.
    Type: Application
    Filed: May 12, 2011
    Publication date: September 8, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Tsuyoshi HIRAKI, Yasuhiko TOMIKAWA, Mayumi YASUKOUCHI, Teruhiko IZUMI
  • Publication number: 20110216639
    Abstract: The present disclosure improves tracking characteristics of an envelope detected from an input signal to the input signal. A detector, which obtains an output signal from an input signal containing a target signal, and outputs the output signal, includes: a comparator configured to compare the input signal to the output signal, and output an obtained comparison result; and an envelope generator configured to weight a first value and a second value having a sign opposite to that of the first value in accordance with the comparison result, integrate the weighted first value and the weighted second value, and output an integral value as the output signal. The envelope generator includes a first gain generator configured to output the first value in accordance with an amplitude of the input signal.
    Type: Application
    Filed: May 12, 2011
    Publication date: September 8, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Yasuhiko TOMIKAWA, Mayumi Yasukouchi, Teruhiko Izumi, Tsuyoshi Hiraki
  • Patent number: 7184097
    Abstract: The present invention provides an on-screen display apparatus which can eliminate variations in the DC level at a time when an input chroma signal and an OSD chroma signal are switched, and prevent an erroneous display of color. The on-screen display apparatus of the present invention comprises a voltage holder which holds a voltage value at a time when the input chroma signal is a null signal, and an output switch which outputs the voltage value held by the voltage holder in an OSD period and outputs the input chroma signal other than the OSD period.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: February 27, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiko Tomikawa, Tomohiro Okuno
  • Publication number: 20020075410
    Abstract: The present invention provides an on-screen display apparatus which can eliminate variations in the DC level at a time when an input chroma signal and an OSD chroma signal are switched, and prevent an erroneous display of color. The on-screen display apparatus of the present invention comprises a voltage holder which holds a voltage value at a time when the input chroma signal is a null signal, and an output switch which outputs the voltage value held by the voltage holder in an OSD period and outputs the input chroma signal other than the OSD period.
    Type: Application
    Filed: December 20, 2001
    Publication date: June 20, 2002
    Inventors: Yasuhiko Tomikawa, Tomohiro Okuno
  • Publication number: 20020015029
    Abstract: An on-screen display device comprises a video signal generation circuit for generating a video signal including an information signal for displaying information on a display screen, a horizontal sync signal, and a color burst signal; a signal conversion circuit for compressing the amplitude of an input signal so that the input signal can exist at a level higher than the level of the horizontal sync signal, and shifting the level of the input signal so that the input signal can exist at a level hither than the level of the horizontal sync signal, thereby generating a first signal; and an output control circuit for outputting the video signal when the information signal is displayed on the display screen, and outputting the first signal when the information signal is not displayed. Therefore, the amplitude level of an external input signal is prevented from becoming lower than the pedestal level, whereby information such as characters can be reliably superimposed on a noise signal.
    Type: Application
    Filed: June 29, 2001
    Publication date: February 7, 2002
    Inventors: Toru Mizushima, Yasuhiko Tomikawa