Patents by Inventor Yasuhiro Domae

Yasuhiro Domae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9779983
    Abstract: A method of forming a shallow trench isolation trench in a semiconductor substrate is described. The method includes forming a trench in a region of the substrate, forming a first dielectric material in the trench, forming a second dielectric material above the first dielectric material, forming a first air gap in the first dielectric material in the trench, and forming a second air gap in the second dielectric material above the first air gap.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: October 3, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Oshi Wakamatsu, Yasuhiro Domae
  • Publication number: 20160351435
    Abstract: A method of forming a shallow trench isolation trench in a semiconductor substrate is described. The method includes forming a trench in a region of the substrate, forming a first dielectric material in the trench, forming a second dielectric material above the first dielectric material, forming a first air gap in the first dielectric material in the trench, and forming a second air gap in the second dielectric material above the first air gap.
    Type: Application
    Filed: May 28, 2015
    Publication date: December 1, 2016
    Applicant: SANDISK TECHNOLOGIES INC.
    Inventors: Oshi Wakamatsu, Yasuhiro Domae
  • Patent number: 7544549
    Abstract: Upon manufacture of a semiconductor device provided with a source region and a drain region formed by activating, through anneal, an n-type first dopant ion-implanted in a p-type device forming area provided in a semiconductor layer formed on an insulator, and a body region, (a) ion implantation of Ar in a boundary region between the source and drain regions to be formed, which corresponds to a region lying in a predeterminate area for forming the body region, and (b) high-temperature anneal for partly recovering crystal defects produced by the ion implantation of the Ar at a temperature higher than the anneal for activation of the first dopant are carried out prior to the ion-implantation of the first dopant.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: June 9, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Yasuhiro Domae
  • Publication number: 20060270125
    Abstract: Upon manufacture of a semiconductor device provided with a source region and a drain region formed by activating, through anneal, an n-type first dopant ion-implanted in a p-type device forming area provided in a semiconductor layer formed on an insulator, and a body region, (a) ion implantation of Ar in a boundary region between the source and drain regions to be formed, which corresponds to a region lying in a predeterminate area for forming the body region, and (b) high-temperature anneal for partly recovering crystal defects produced by the ion implantation of the Ar at a temperature higher than the anneal for activation of the first dopant are carried out prior to the ion-implantation of the first dopant.
    Type: Application
    Filed: May 31, 2006
    Publication date: November 30, 2006
    Inventor: Yasuhiro Domae