Abstract: A device includes a semiconductor layer on an insulating layer; a gate insulator on the semiconductor layer; a comb-shaped gate electrode on the gate insulator, including a base portion extending in a first direction and tooth portions extending in a second direction from one side surface of the base portion; a comb-shaped low-concentration diffusion layer in the semiconductor layer under the gate electrode having a first electroconductive type; a source layer in the semiconductor layer on the tooth portion side of the base portion having second electroconductive type with high concentration; a drain layer in the semiconductor layer on a side of the base portion opposite the tooth portion side having second electroconductive type with high concentration; and an extraction layer in the semiconductor layer between the source and the device isolating layers having first electroconductive type with high concentration, and connected with the diffusion layer.

Abstract: A device includes a semiconductor layer on an insulating layer; a gate insulator on the semiconductor layer; a comb-shaped gate electrode on the gate insulator, including a base portion extending in a first direction and tooth portions extending in a second direction from one side surface of the base portion; a comb-shaped low-concentration diffusion layer in the semiconductor layer under the gate electrode having a first electroconductive type; a source layer in the semiconductor layer on the tooth portion side of the base portion having second electroconductive type with high concentration; a drain layer in the semiconductor layer on a side of the base portion opposite the tooth portion side having second electroconductive type with high concentration; and an extraction layer in the semiconductor layer between the source and the device isolating layers having first electroconductive type with high concentration, and connected with the diffusion layer.

Abstract: A method of producing a semiconductor device includes the steps of: introducing a p-type impurity corresponding to a conductive type of a channel area into a channel forming area; introducing fluorine into the channel forming area at a low acceleration voltage; and thermally processing a substrate to increase a threshold voltage. In the method of the present invention, the step of thermally processing the substrate is performed after the steps of introducing the p-type impurity into the channel forming area and introducing fluorine into the channel forming area. Further, the steps of introducing the p-type impurity into the channel forming area and introducing fluorine into the channel forming area may be performed any order.

Abstract: A method of manufacturing a semiconductor device includes forming first and second active regions and a field region in a surface of a substrate; forming a first gate insulating film in the first and second active regions; covering the surface of the substrate with a first polycrystalline silicon film; exposing the first gate insulating film on the second active region by forming an aperture in the first polycrystalline silicon film over the second active region; removing the first gate insulating film in the second active region; forming a second gate insulating film which is thicker than the first gate insulating film in the second active region; covering the surface of the substrate with a second polycrystalline silicon film; removing the second polycrystalline silicon film on the first active region until it becomes a predetermined film thickness; and forming gate electrodes on the first and second active regions.

Abstract: A method of manufacturing a semiconductor device includes providing a substrate and forming a projecting alignment mark. The substrate includes an insulating layer and a semiconductor layer on the insulating layer, and the substrate includes device areas and a scribe line area which surrounds the device area in the semiconductor layer. The projecting alignment mark is formed on the scribe line area.

Abstract: The present invention provides a method of manufacturing a semiconductor device comprising: preparing a support substrate; forming first and second active regions and a field region in a surface of the support substrate; forming a first gate insulating film in the first and second active regions; covering the entire surface of the support substrate with a first polycrystalline silicon film; exposing the first gate insulating film on the second active region by forming an aperture in the first polycrystalline silicon film over the second active region; removing the first gate insulating film in the second active region; forming a second gate insulating film which is thicker than the first gate insulating film in the second active region; covering the entire surface of the support substrate with a second polycrystalline silicon film; removing the second polycrystalline silicon film on the first active region until it becomes a predetermined film thickness; and forming gate electrodes on the first and second act

Abstract: A method of manufacturing a semiconductor device includes providing a substrate and forming a projecting alignment mark. The substrate includes an insulating layer and a semiconductor layer on the insulating layer, and the substrate includes device areas and a scribe line area which surrounds the device area in the semiconductor layer. The projecting alignment mark is formed on the scribe line area.

Abstract: A method for manufacturing a field effect transistor (FET) which is capable of effectively inhibiting an expansion of a depletion layer between a source and a drain in the FET, without causing variations in electrical characteristics, at a comparatively low impurity concentration. After a conductive layer for a gate electrode has been formed on a semiconductor substrate, in order to remove unwanted portions from the conductive layer by lithography, an etching mask is formed at locations corresponding to the gate electrode and, by using the etching mask as a mask for ion implantation, an impurity is implanted to form an impurity region in a predetermined region of a semiconductor substrate existing under the conductive layer.

Abstract: A method for manufacturing a field effect transistor (FET) which is capable of effectively inhibiting an expansion of a depletion layer between a source and a drain in the FET, without causing variations in electrical characteristics, at a comparatively low impurity concentration.