Abstract: A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer.

Abstract: A semiconductor device includes: an inversion type semiconductor element that includes: a substrate having a first conductivity type or a second conductivity type; a first conductivity type layer formed on the substrate; a second conductivity type region that is formed on the first conductivity type layer; a JFET portion that is formed on the first conductivity type layer, is sandwiched by the second conductivity type region to be placed; a source region that is formed on the second conductivity region; a gate insulation film formed on a channel region that is a part of the second conductivity type region; a gate electrode formed on the gate insulation film; an interlayer insulation film covering the gate electrode and the gate insulation film, and including a contact hole; a source electrode electrically connected to the source region through the contact hole; and a drain electrode formed on a back side of the substrate.

Abstract: A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer.

Abstract: A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer.

Abstract: A semiconductor device includes an inversion type semiconductor element, which has: a substrate; a drift layer; a saturation current suppression layer; a current dispersion layer; a base region; a source region; a connection layer; a plurality of trench gate structures; an interlayer insulation film; a source electrode; and a drain electrode. A channel region is provided in a portion of the base region in contact with each trench gate structure by applying a gate voltage to the gate electrode and applying a normal operation voltage as a drain voltage to the drain electrode; and a current flows between the source electrode and the drain electrode through the source region and the JFET portion.

Abstract: A silicon carbide semiconductor device includes: a substrate; a first impurity region on the substrate; a base region on the first impurity region; a second impurity region in the base region; a trench gate structure including a gate insulation film and a gate electrode in a trench; a first electrode connected to the second impurity region and the base region; a second electrode on a rear surface of the substrate; a first current dispersion layer between the first impurity region and the base region; a plurality of first deep layers in the second current dispersion layer; a second current dispersion layer between the first current dispersion layer and the base region; and a second deep layer between the first current dispersion layer and the base region apart from the trench.

Abstract: A semiconductor device includes: an inversion type semiconductor element that includes: a substrate having a first conductivity type or a second conductivity type; a first conductivity type layer formed on the substrate; a second conductivity type region that is formed on the first conductivity type layer; a JFET portion that is formed on the first conductivity type layer, is sandwiched by the second conductivity type region to be placed; a source region that is formed on the second conductivity region; a gate insulation film formed on a channel region that is a part of the second conductivity type region; a gate electrode formed on the gate insulation film; an interlayer insulation film covering the gate electrode and the gate insulation film, and including a contact hole; a source electrode electrically connected to the source region through the contact hole; and a drain electrode formed on a back side of the substrate.

Abstract: A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer.

Abstract: A silicon carbide semiconductor device includes: a substrate; a first impurity region on the substrate; a base region on the first impurity region; a second impurity region in the base region; a trench gate structure including a gate insulation film and a gate electrode in a trench; a first electrode connected to the second impurity region and the base region; a second electrode on a rear surface of the substrate; a first current dispersion layer between the first impurity region and the base region; a plurality of first deep layers in the second current dispersion layer; a second current dispersion layer between the first current dispersion layer and the base region; and a second deep layer between the first current dispersion layer and the base region apart from the trench.

Abstract: A semiconductor device includes an inversion type semiconductor element, which has: a substrate; a drift layer; a saturation current suppression layer; a current dispersion layer; a base region; a source region; a connection layer; a plurality of trench gate structures; an interlayer insulation film; a source electrode; and a drain electrode. A channel region is provided in a portion of the base region in contact with each trench gate structure by applying a gate voltage to the gate electrode and applying a normal operation voltage as a drain voltage to the drain electrode; and a current flows between the source electrode and the drain electrode through the source region and the JFET portion.

Abstract: A method of manufacturing a switching device may include: forming a plurality of trenches in an upper surface of a semiconductor substrate, the plurality of trenches extending in parallel to each other at the upper surface; forming a mask including a masking portion and an opening portion, the masking portion and the opening portion being arranged on each of the trenches alternately and repeatedly along a longitudinal direction of the trenches; and implanting p-type impurities to a bottom surface of each of the trenches through the mask so as to form a plurality of bottom p-type regions.

Abstract: A silicon carbide single crystal includes: threading dislocations each of which having a dislocation line extending through a C-plane, and a Burgers vector including at least a component in a C-axis direction. In addition, a density of the threading dislocations having angles, each of which is formed by an orientation of the Burgers vector and an orientation of the dislocation line, larger than 0° and within 40° is set to 300 dislocations/cm2 or less. Furthermore, a density of the threading dislocations having the angles larger than 40° is set to 30 dislocations/cm2 or less.

Abstract: A silicon carbide single crystal includes: threading dislocations each of which having a dislocation line extending through a C-plane, and a Burgers vector including at least a component in a C-axis direction. In addition, a density of the threading dislocations having angles, each of which is formed by an orientation of the Burgers vector and an orientation of the dislocation line, larger than 0° and within 40° is set to 300 dislocations/cm2 or less. Furthermore, a density of the threading dislocations having the angles larger than 40° is set to 30 dislocations/cm2 or less.

Abstract: An insulated gate type switching device includes: a first region being of a first conductivity type; a body region being of a second conductivity type and in contact with the first region; a second region being of the first conductivity type and separated from the first region by the body region; an insulating film being in contact with the first region, the body region and the second region; and a gate electrode facing the body region via the insulating film. The body region includes a first body region and a second body region. The first body region has a theoretical threshold level Vth larger than that of the second body region.

Abstract: A leg assist device having an abnormality management procedure which appropriately adapts to an abnormal situation is provided. The leg assist device is provided with a leg attachment and a controller. The leg attachment comprises upper and a lower links connected with a rotary joint, and an actuator. The upper link is to be attached to the upper leg of the user. The lower link is to be attached to the lower leg of the user. The actuator swings the lower link relative to the upper link. The controller outputs the commands so that the swing angle of the lower link follows a target trajectory. Further, the controller executes a first abnormality management process in which the controller shuts off torque transmission from the actuator to the user when the controller detects an abnormality before outputting the commands to the actuator.

Abstract: A walk assistance device comprises a thigh unit configured to be arranged on a thigh of the user, a shank unit configured to be arranged on a shank of the user, a foot unit configured to be arranged on a foot of the user, a knee position joint unit configured to couple the thigh unit and the shank unit in a swingable manner, and an ankle position joint unit configured to couple the shank unit and the foot unit in a swingable manner. The shank unit comprises a first replaceable member and a second replaceable member that extend along the shank of the user, and a length of the shank unit is adjustable by replacing each of the first and second replaceable members with another one having a different length.

Abstract: A leg assist device having an abnormality management procedure which appropriately adapts to an abnormal situation is provided. The leg assist device is provided with a leg attachment and a controller. The leg attachment comprises upper and a lower links connected with a rotary joint, and an actuator. The upper link is to be attached to the upper leg of the user. The lower link is to be attached to the lower leg of the user. The actuator swings the lower link relative to the upper link. The controller outputs the commands so that the swing angle of the lower link follows a target trajectory. Further, the controller executes a first abnormality management process in which the controller shuts off torque transmission from the actuator to the user when the controller detects an abnormality before outputting the commands to the actuator.

Abstract: A walk assistance device comprises a thigh unit configured to be arranged on a thigh of the user, a shank unit configured to be arranged on a shank of the user, a foot unit configured to be arranged on a foot of the user, a knee position joint unit configured to couple the thigh unit and the shank unit in a swingable manner, and an ankle position joint unit configured to couple the shank unit and the foot unit in a swingable manner. The shank unit comprises a first replaceable member and a second replaceable member that extend along the shank of the user, and a length of the shank unit is adjustable by replacing each of the first and second replaceable members with another one having a different length.

Abstract: A first member of a robot is fixed to a casing of a speed reducer. A second member is fixed by fitting to a rotating member that rotates relatively to the casing. A motor is mounted on the second member, and an input gear that is connected directly to the shaft of the motor and a spur gear of the speed reducer are made to mesh with each other. A crankshaft that is connected to the spur gear is rotatably mounted on the rotating member through a bearing. As the spur gear and the crankshaft rotate, an external gear rocks eccentrically and rotates for on tooth with respect to an internal gear in the casing. Thereupon, the rotating member rotates relatively to the casing, while the second member rotates relatively to the first member. The speed reducer of the invention, compared with a conventional one, requires no use of a center gear, so that it includes fewer components, and therefore, is lower-priced and more reliable.

Abstract: An apparatus for and a method of assembling small numbers of a large variety of different products are disclosed. In order to eliminate stock of parts and prevent error in assembling inappropriate part, a straight pipe or rod is subjected to bending to a desired curved shape, and set to a predetermined position to assemble with the other parts, and then assembled.