Abstract: Objects of the invention are to minimize power consumption while maintaining the required information processing capabilities of an LSI chip by supplying multiple voltages to the LSI chip such that its circuit blocks receive necessary voltages and to prevent an increase in the chip area of the LSI chip and performance degradation of signal wires, which may result from the supply of the multiple voltages, by reducing the number of power supply wires. In an LSI chip to which two voltages are supplied, high voltage wires are more densely spaced than low voltage wires. By selectively applying voltages based on circuit block performance, it is possible to reduce power consumption while maintaining the amount of information processed by the LSI chip.

Abstract: A scan chain group structure in which a group of scan chains formed for each clock tree system in an LSI is subjected to a reconnection process so that the scan chain group is not present across a plurality of clock distribution regions obtained by dividing the clock-supplied region of the clock tree of one system and that the connection distance thereof in the distribution region becomes short, a test clock input mechanism in which test clocks to be input to the distribution regions are independent sub-clock phases, and an on/off mechanism of the clocks to be input to the distribution regions are realized. Further, the scan-in/out and scan test performed at the same time are limited in one region or between single regions, and tests in all regions and between all regions are carried out by a plurality of times of test steps.

Abstract: In a data transfer device which cancells an offset of a differential amplifier for amplifying a received signal and an offset caused by characteristics of a differential transmission line and selects optimum conditions such as pre-emphasis amount of an output pre-emphasis circuit, a first chip (transmission side LSI=transfer engine 210) and a second chip (reception side LSI=multiplexing engine 330) are connected to each other through differential transmission line 430 and a SerDes (serializer) 401 and a SerDes (deserializer) 402 are used to make signal transmission, so that optimum setting conditions of an offset amount of an offset cancellation circuit included in an input buffer amplifier and a pre-emphasis amount of pre-emphasis circuit included in an output buffer are decided in training using a training PRBS generator 560 and a training PRBS comparator 570.

Abstract: Provided is a control technique of a semiconductor integrated circuit capable by which power on/shut-off of a power shut-off area at an optimum speed in accordance with variations in fabricating devices as suppressing the malfunction of a circuit during operation in the power on/shut-off. A semiconductor integrated circuit includes: an always-on area; a power shut-off area; and a plurality of power-supply switches connected to the power shut-off area for supplying or shutting off the power to the power shut-off area. Further, the semiconductor integrated circuit includes a switch controller for carrying out the power on/shut-off by controlling on/off of the plurality of power-supply switches and changing the transition time of the power on/shut-off in accordance with a performance of each of the semiconductor integrated circuit after fabricating. Further, the semiconductor integrated circuit includes a memory for recording the performance of each of the semiconductor integrated circuit after fabricating.

Abstract: A disclosed optical element includes: a transparent substrate; a subwavelength structure layer disposed on the transparent substrate, the subwavelength structure layer having a refractive index different from a refractive index of the transparent substrate; a minute concave and convex structure of one-dimensional grating formed on the subwavelength structure layer with a subwavelength period smaller than a wavelength to be used, where a concave portion reaches a boundary surface between the transparent substrate and the subwavelength structure layer; and an open hole portion formed on a subwavelength structure layer side of the transparent substrate so as to communicate with the concave portion of the minute structure and to be arranged with the same period as in the minute structure of one-dimensional grating. At least at the open hole portion, a refractive index relative to an incident light is changed in a direction orthogonal to the boundary surface.

Abstract: Objects of the invention are to minimize power consumption while maintaining the required information processing capabilities of an LSI chip by supplying multiple voltages to the LSI chip such that its circuit blocks receive necessary voltages and to prevent an increase in the chip area of the LSI chip and performance degradation of signal wires, which may result from the supply of the multiple voltages, by reducing the number of power supply wires. In an LSI chip to which two voltages are supplied, high voltage wires are more densely spaced than low voltage wires. By selectively applying voltages based on circuit block performance, it is possible to reduce power consumption while maintaining the amount of information processed by the LSI chip.

Abstract: Clock skew can be reduced by suppressing fluctuation in wiring leads between the final stage clock buffers and the clock distribution circuit for supplying the clock. In view of attaining such reduction of clock skew, an upstream of the clock distribution circuit is formed in an H tree structure and the final stage is formed in a local fishbone structure. A plurality of main clock lines connected to the final stage buffer include a first main clock line and a second main clock line. The number of cell arrangement allowable rows where a plurality of first flip-flops for receiving the clock from the first main clock line are located is different from the number of cell arrangement allowable rows where a plurality first flip-flops for receiving the clock from the second main clock line are located.

Abstract: A scan chain group structure in which a group of scan chains formed for each clock tree system in an LSI is subjected to a reconnection process so that the scan chain group is not present across a plurality of clock distribution regions obtained by dividing the clock-supplied region of the clock tree of one system and that the connection distance thereof in the distribution region becomes short, a test clock input mechanism in which test clocks to be input to the distribution regions are independent sub-clock phases, and an on/off mechanism of the clocks to be input to the distribution regions are realized. Further, the scan-in/out and scan test performed at the same time are limited in one region or between single regions, and tests in all regions and between all regions are carried out by a plurality of times of test steps.

Abstract: Clock skew can be reduced by suppressing fluctuation in wiring leads between the final stage clock buffers and the clock distribution circuit for supplying the clock. In view of attaining such reduction of clock skew, an upstream of the clock distribution circuit is formed in an H tree structure and the final stage is formed in a local fishbone structure. A plurality of main clock lines connected to the final stage buffer include a first main clock line and a second main clock line. The number of cell arrangement allowable rows where a plurality of first flip-flops for receiving the clock from the first main clock line are located is different from the number of cell arrangement allowable rows where a plurality first flip-flops for receiving the clock from the second main clock line are located.

Abstract: A disclosed optical element includes: a transparent substrate; a subwavelength structure layer disposed on the transparent substrate, the subwavelength structure layer having a refractive index different from a refractive index of the transparent substrate; a minute concave and convex structure of one-dimensional grating formed on the subwavelength structure layer with a subwavelength period smaller than a wavelength to be used, where a concave portion reaches a boundary surface between the transparent substrate and the subwavelength structure layer; and an open hole portion formed on a subwavelength structure layer side of the transparent substrate so as to communicate with the concave portion of the minute structure and to be arranged with the same period as in the minute structure of one-dimensional grating. At least at the open hole portion, a refractive index relative to an incident light is changed in a direction orthogonal to the boundary surface.

Abstract: In a data transfer device which cancels an offset of a differential amplifier for amplifying a received signal and an offset caused by characteristics of a differential transmission line and selects optimum conditions such as pre-emphasis amount of an output pre-emphasis circuit, a first chip (transmission side LSI=transfer engine 210) and a second chip (reception side LSI=multiplexing engine 330) are connected to each other through differential transmission line 430 and a SerDes (serializer) 401 and a SerDes (deserializer) 402 are used to make signal transmission, so that optimum setting conditions of an offset amount of an offset cancellation circuit included in an input buffer amplifier and a pre-emphasis amount of pre-emphasis circuit included in an output buffer are decided in training using a training PRBS generator 560 and a training PRBS comparator 570.

Abstract: The invention provides a technique that enables a correct discrimination of reception data, when the supply voltage of a semiconductor integrated circuit having a simultaneous bi-directional interface is decreased. The data transmission system is provided with input circuits constituting a simultaneous bi-directional interface by the number of reference voltages used. Each of the input circuits is supplied with a fixed reference voltage, the input circuit supplied with a higher reference voltage employs a differential amplifier with n-channel MOSFETs served as input differential devices, and the input circuit supplied with a lower reference voltage employs a differential amplifier with p-channel MOSFETs served as input differential devices, in which selectors switch the outputs of the two differential amplifiers in correspondence with the output data of their own. Thus, the system attains the reception data.

Abstract: Control data is stored in a first memory. Control data inputted from an external device is stored a second rewritable memory. A control section selects either one of the first and second memories and controls operation according to a control program using the control data stored in the memory selected. An image corresponding to control data is displayed on a display screen. Through the image, it is possible to select particular control data from a plurality of control data. The control data selected via the screen is sent to the second memory. Processing can be therefore executed to appropriately cope with requirements of the user.

Abstract: To change a value of a DSP parameter in a DSP setting screen, a user selects from parameter operators a parameter value to be changed. In an image picture displayed on the DSP setting screen, a size, a color, and the like corresponding to substance of the pertinent parameter are changed according to the value of the parameter. The user can visually perceive effect of the value of each DSP parameter on an acoustic effect and can easily change the value of each DSP parameter.

Abstract: As a desired digital signal processor (DSP) mode is selected from DSP setting buttons displayed in a DSP setting window, only those slide bars for changing parameters of the selected DSP mode are displayed. As a slider bar corresponding to a parameter to be changed is selected from the slide bars displayed in the DSP setting window, an area of an impulse response diagram to be influenced by a change in the parameter value is indicated in a discriminatory manner by an arrow or the like. A user can visually confirm the acoustic effect to be changed by the value of each DSP parameter and can change the parameter value with ease.

Abstract: The invention provides a technique that enables a correct discrimination of reception data, when the supply voltage of a semiconductor integrated circuit having a simultaneous bi-directional interface is decreased. The data transmission system is provided with input circuits constituting a simultaneous bi-directional interface by the number of reference voltages used. Each of the input circuits is supplied with a fixed reference voltage, the input circuit supplied with a higher reference voltage employs a differential amplifier with n-channel MOSFETs served as input differential devices, and the input circuit supplied with a lower reference voltage employs a differential amplifier with p-channel MOSFETs served as input differential devices, in which selectors switch the outputs of the two differential amplifiers in correspondence with the output data of their own. Thus, the system attains the reception data.

Abstract: Read signals to be outputted in the unit of bits from a packaged RAM are received to produce complementary output signals, and these output signals and the non-inverted and inverted signals of expected values are individually inputted to two logic circuits, so that the outputs of the logic circuits are compared by a coincidence/incoincidence circuit to produce a decision output.

Abstract: A method and arrangement of locating cordless units in a wide area cordless telephone system is disclosed. A service area is previously divided into a plurality of small service zones and, a plurality of cordless units are provided for establishing communications with a system controller via a plurality of access stations. The system controller locates the cordless units and stores therein location data thereof. Each of the cordless units also stores the location data thereof applied from the system controller. A cordless unit issues a request signal which includes cordless unit location data. The request signal is received at an access station which in turn checks to determine if the request signal applied thereto is issued from a cordless unit whose location data indicates a service zone belonging to a predetermined service zone group.

Abstract: An integrated circuit including latch circuits disposed on the input and output sides of an object circuit the delay time of which is to be measured, respectively, and a variable delay circuit capable of arbitrarily delaying a timing signal supplied from outside or a timing signal generated inside the integrated circuit by an instruction from outside. The timing signal and a delay signal obtained by delaying the input signal by the variable delay circuit are supplied as clock signals to the latch circuits, and the signal passing through the variable delay circuit is fed back to the input side so as to constitute an oscillation circuit, the oscillation signal of which can be outputted to outside. A signal delayed by a desired time can be automatically generated inside the semiconductor integrated circuit on the basis of this timing signal.