Patents by Inventor Yasuhiro Kaneda

Yasuhiro Kaneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10903524
    Abstract: The present invention relates to a resin coated metal laminate comprising at least a sealant layer, a barrier layer, and a substrate layer in this order, wherein the barrier layer includes stainless steel having a thickness of 50 ?m or less, the substrate layer includes a polyamide as a main component, a thickness of the substrate layer is thinner than a thickness of the barrier layer, and a maximum value of tensile strength in a tensile test of the substrate layer is 25 N/mm or more, as well as a battery package and a battery using the resin coated metal laminate.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: January 26, 2021
    Assignee: FUJIMORI KOGYO CO., LTD.
    Inventors: Hirokazu Iizuka, Yasuhiro Kaneda, Yuki Sato
  • Publication number: 20180019502
    Abstract: The present invention relates to a resin coated metal laminate comprising at least a sealant layer, a barrier layer, and a substrate layer in this order, wherein the barrier layer includes stainless steel having a thickness of 50 ?m or less, the substrate layer includes a polyamide as a main component, a thickness of the substrate layer is thinner than a thickness of the barrier layer, and a maximum value of tensile strength in a tensile test of the substrate layer is 25 N/mm or more, as well as a battery package and a battery using the resin coated metal laminate.
    Type: Application
    Filed: July 13, 2017
    Publication date: January 18, 2018
    Inventors: Hirokazu IIZUKA, Yasuhiro KANEDA, Yuki SATO
  • Patent number: 7208996
    Abstract: A reverse current is prevented in a charge pump circuit. A complementary pair of clocks CLK and *CLK varies while a first through a fourth charge transfer MOS transistors M11, M12, M13 and M14 are turned off. Then the second charge transfer MOS transistor M12 is turned on to discharge a first pumping capacitor CA and the third charge transfer MOS transistor M13 is turned on to charge a second pumping capacitor CB. Next, the complementary pair of clocks CLK and *CLK varies after the first through the fourth charge transfer MOS transistors M11, M12, M13 and M14 are turned off again. Then the fourth charge transfer MOS transistor M14 is turned on to discharge the second pumping capacitor CB and the first charge transfer MOS transistor M11 is turned on to charge the first pumping capacitor CA.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: April 24, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tatsuya Suzuki, Yasuhiro Kaneda
  • Publication number: 20050213781
    Abstract: A reverse current is prevented in a charge pump circuit. A complementary pair of clocks CLK and *CLK varies while a first through a fourth charge transfer MOS transistors M11, M12, M13 and M14 are turned off. Then the second charge transfer MOS transistor M12 is turned on to discharge a first pumping capacitor CA and the third charge transfer MOS transistor M13 is turned on to charge a second pumping capacitor CB. Next, the complementary pair of clocks CLK and *CLK varies after the first through the fourth charge transfer MOS transistors M11, M12, M13 and M14 are turned off again. Then the fourth charge transfer MOS transistor M14 is turned on to discharge the second pumping capacitor CB and the first charge transfer MOS transistor M11 is turned on to charge the first pumping capacitor CA.
    Type: Application
    Filed: March 25, 2005
    Publication date: September 29, 2005
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Tatsuya Suzuki, Yasuhiro Kaneda