Patents by Inventor Yasuhiro Kawata
Yasuhiro Kawata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11922840Abstract: A liquid crystal display device includes a pixel array including a plurality of rows of gate lines, a plurality of columns of source lines, a plurality of switches, and a plurality of liquid crystal cells; a gate driver IC connected to the gate lines; a source driver IC connected to the source lines; a timing control IC arranged to control operation timings of the gate driver IC and the source driver IC; and a system power supply IC arranged to supply a power supply voltage to the source driver IC. Each of the timing control IC and the system power supply IC has a function of detecting an abnormality in the gate driver IC and an abnormality in the source driver IC.Type: GrantFiled: July 13, 2022Date of Patent: March 5, 2024Assignee: Rohm Co., Ltd.Inventors: Yasuhiro Tamano, Shinji Kawata, Yoko Nomaguchi
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Patent number: 9735548Abstract: A semiconductor laser element includes a semiconductor structure having an optical cavity and a protective film. The semiconductor structure includes a pair of stepped parts at both ends of the semiconductor structure in a cavity width direction, and a first texture pattern extending in a cavity length direction on a bottom surface of each of the stepped parts. The first texture pattern includes recesses and/or protrusions along the cavity length direction. The protective film covers at least part of the first texture pattern to define a second texture pattern having upper surfaces and bottom surfaces. A length of the bottom surfaces of the second texture pattern is less than a height from the bottom surfaces to a surface of the semiconductor structure. A length of the upper surfaces of the second texture pattern is less than a height from the upper surfaces to the surface of the semiconductor structure.Type: GrantFiled: December 13, 2016Date of Patent: August 15, 2017Assignee: Nichia CorporationInventors: Susumu Harada, Yasuhiro Kawata
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Patent number: 9692208Abstract: A method of manufacturing a semiconductor device includes: forming a ridge on a semiconductor layer stacked on a substrate by removing a part of the semiconductor layer; forming an electrode on the ridge so as to have a flat portion having a flat surface substantially parallel to the upper surface of the ridge and sloped portions on both sides of the flat portion with each of the sloped portions having a sloped surface that is sloped with respect to the upper surface of the ridge; forming a protective film disposed on each side of the ridge to cover a region from the side surface of the ridge to the sloped surface of the sloped portion of the electrode; and forming a pad electrode at least on an upper surface of the electrode and the protective film.Type: GrantFiled: March 11, 2016Date of Patent: June 27, 2017Assignee: NICHIA CORPORATIONInventors: Atsuo Michiue, Yasuhiro Kawata
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Publication number: 20170093131Abstract: A semiconductor laser element includes a semiconductor structure having an optical cavity and a protective film. The semiconductor structure includes a pair of stepped parts at both ends of the semiconductor structure in a cavity width direction, and a first texture pattern extending in a cavity length direction on a bottom surface of each of the stepped parts. The first texture pattern includes recesses and/or protrusions along the cavity length direction. The protective film covers at least part of the first texture pattern to define a second texture pattern having upper surfaces and bottom surfaces. A length of the bottom surfaces of the second texture pattern is less than a height from the bottom surfaces to a surface of the semiconductor structure. A length of the upper surfaces of the second texture pattern is less than a height from the upper surfaces to the surface of the semiconductor structure.Type: ApplicationFiled: December 13, 2016Publication date: March 30, 2017Inventors: Susumu HARADA, Yasuhiro KAWATA
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Patent number: 9553425Abstract: A method of manufacturing a plurality of semiconductor laser elements having; preparing the semiconductor wafer; forming grooves that extend along second lines on a first main surface side of the semiconductor wafer, and forming a first texture pattern along second lines on a bottom surface of the grooves, the second lines being parallel to a cavity length direction; forming a second texture pattern along the second lines by covering at least part of the first texture pattern with a protective film; and splitting the semiconductor wafer along first lines, the first lines being parallel to a cavity width direction, and splitting along the second lines using a second main surface, which is an opposite side of the first main surface, of the semiconductor wafer as an origin.Type: GrantFiled: August 28, 2015Date of Patent: January 24, 2017Assignee: NICHIA CORPORATIONInventors: Susumu Harada, Yasuhiro Kawata
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Publication number: 20160197456Abstract: A method of manufacturing a semiconductor device includes: forming a ridge on a semiconductor layer stacked on a substrate by removing a part of the semiconductor layer; forming an electrode on the ridge so as to have a flat portion having a flat surface substantially parallel to the upper surface of the ridge and sloped portions on both sides of the flat portion with each of the sloped portions having a sloped surface that is sloped with respect to the upper surface of the ridge; forming a protective film disposed on each side of the ridge to cover a region from the side surface of the ridge to the sloped surface of the sloped portion of the electrode; and forming a pad electrode at least on an upper surface of the electrode and the protective film.Type: ApplicationFiled: March 11, 2016Publication date: July 7, 2016Inventors: Atsuo MICHIUE, Yasuhiro KAWATA
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Patent number: 9318874Abstract: A semiconductor device includes a semiconductor layer stacked on a substrate, a stripe-shaped ridge formed on a surface of the semiconductor layer, and electrode formed on an upper surface of the ridge and a protective film disposed on each side of the ridge. The electrode includes a flat portion having a flat surface substantially parallel to the upper surface of the ridge and sloped portions on both sides of the flat portion with each of the sloped portions having a sloped surface that is sloped with respect to the upper surface of the ridge. The protective film covers a region from a side surface of the ridge to the sloped surface of the sloped portion of the electrode.Type: GrantFiled: June 1, 2010Date of Patent: April 19, 2016Assignee: NICHIA CORPORATIONInventors: Atsuo Michiue, Yasuhiro Kawata
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Publication number: 20160072257Abstract: A method of manufacturing a plurality of semiconductor laser elements having; preparing the semiconductor wafer; forming grooves that extend along second lines on a first main surface side of the semiconductor wafer, and forming a first texture pattern along second lines on a bottom surface of the grooves, the second lines being parallel to a cavity length direction; forming a second texture pattern along the second lines by covering at least part of the first texture pattern with a protective film; and splitting the semiconductor wafer along first lines, the first lines being parallel to a cavity width direction, and splitting along the second lines using a second main surface, which is an opposite side of the first main surface, of the semiconductor wafer as an origin.Type: ApplicationFiled: August 28, 2015Publication date: March 10, 2016Inventors: Susumu HARADA, Yasuhiro KAWATA
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Patent number: 9225146Abstract: The present invention is aimed to prevent occurrence of COD and rapid degradation of light output in semiconductor laser devices. The semiconductor laser device includes a semiconductor laser element 100A and a support member 200. The semiconductor laser element 100a includes a first electrode 13, a substrate 11, and a semiconductor structure 12 having an emitting facet and a reflecting facet, a second electrode 15, and a pad 16, in this order. The semiconductor laser element 100A is connected to a support member 200 at its pad 16 side via a connecting member 300. The emitting-side end portion of the second electrode 15 is spaced apart from the emitting facet of the semiconductor structure 12, and the emitting-side end portion of the pad 16 is located at an outer side than the emitting-side end portion the second electrode 15.Type: GrantFiled: March 14, 2013Date of Patent: December 29, 2015Assignee: NICHIA CORPORATIONInventors: Shingo Masui, Yasuhiro Kawata, Tsuyoshi Hirao
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Patent number: 8995492Abstract: To provide a ridge-type semiconductor laser element capable of preventing inclination at the time of junction-down bonding and having high heat dissipation, in a semiconductor laser element including a substrate, a semiconductor portion disposed on the substrate and having a ridge on a surface at an opposite side from the substrate, an electrode disposed on a ridge, an insulating layer disposed on the semiconductor portion at the both sides of the ridge and a pad electrode disposed on the electrode, in which, the pad electrode side is a mounting surface side, the pad electrode is disposed extending on the insulating layer, and a spacer is disposed between the semiconductor portion and the pad electrode at parts spaced apart from the ridge.Type: GrantFiled: July 4, 2012Date of Patent: March 31, 2015Assignee: Nichia CorporationInventors: Shingo Masui, Yasuhiro Kawata, Hideyuki Fujimoto, Atsuo Michiue
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Publication number: 20140204969Abstract: The present invention is aimed to prevent occurrence of COD and rapid degradation of light output in semiconductor laser devices. The semiconductor laser device includes a semiconductor laser element 100A and a support member 200. The semiconductor laser element 100a includes a first electrode 13, a substrate 11, and a semiconductor structure 12 having an emitting facet and a reflecting facet, a second electrode 15, and a pad 16, in this order. The semiconductor laser element 100A is connected to a support member 200 at its pad 16 side via a connecting member 300. The emitting-side end portion of the second electrode 15 is spaced apart from the emitting facet of the semiconductor structure 12, and the emitting-side end portion of the pad 16 is located at an outer side than the emitting-side end portion the second electrode 15.Type: ApplicationFiled: March 14, 2013Publication date: July 24, 2014Inventors: Shingo MASUI, Yasuhiro Kawata, Tsuyoshi Hirao
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Publication number: 20140140362Abstract: To provide a ridge-type semiconductor laser element capable of preventing inclination at the time of junction-down bonding and having high heat dissipation, in a semiconductor laser element including a substrate, a semiconductor portion disposed on the substrate and having a ridge on a surface at an opposite side from the substrate, an electrode disposed on a ridge, an insulating layer disposed on the semiconductor portion at the both sides of the ridge and a pad electrode disposed on the electrode, in which, the pad electrode side is a mounting surface side, the pad electrode is disposed extending on the insulating layer, and a spacer is disposed between the semiconductor portion and the pad electrode at parts spaced apart from the ridge.Type: ApplicationFiled: July 4, 2012Publication date: May 22, 2014Inventors: Shingo Masui, Yasuhiro Kawata, Hideyuki Fujimoto, Atsuo Michiue
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Publication number: 20100308445Abstract: A semiconductor device includes a semiconductor layer stacked on a substrate, a stripe-shaped ridge formed on a surface of the semiconductor layer, and electrode formed on an upper surface of the ridge and a protective film disposed on each side of the ridge. The electrode includes a flat portion having a flat surface substantially parallel to the upper surface of the ridge and sloped portions on both sides of the flat portion with each of the sloped portions having a sloped surface that is sloped with respect to the upper surface of the ridge. The protective film covers a region from a side surface of the ridge to the sloped surface of the sloped portion of the electrode.Type: ApplicationFiled: June 1, 2010Publication date: December 9, 2010Applicant: NICHIA CORPORATIONInventors: Atsuo MICHIUE, Yasuhiro KAWATA
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Patent number: 6877118Abstract: A memory testing method and apparatus are provided, which can test in short time a flash memory. In case of testing a flash memory having block function, in a memory testing method and apparatus in which a predetermined logical value is written in memory cells constituting each of blocks of the memory, the written logical value is read out from the memory cells to compare it with an expected value, and a decision that, when the read-out logical value and the expected value do not coincide with each other, such memory cell is a failure memory cell, a decision is rendered that, when the number of failure memory cells in each block reaches a predetermined number, such block is a bad block, and the test of such block is stopped.Type: GrantFiled: April 27, 2001Date of Patent: April 5, 2005Assignee: Advantest CorporationInventors: Hiromi Oshima, Noboru Okino, Yasuhiro Kawata
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Publication number: 20010052093Abstract: A memory testing method and apparatus are provided, which can test in short time a flash memory. In case of testing a flash memory having block function, in a memory testing method and apparatus in which a predetermined logical value is written in memory cells constituting each of blocks of the memory, the written logical value is read out from the memory cells to compare it with an expected value, and a decision that, when the read-out logical value and the expected value do not coincide with each other, such memory cell is a failure memory cell, a decision is rendered that, when the number of failure memory cells in each block reaches a predetermined number, such block is a bad block, and the test of such block is stopped.Type: ApplicationFiled: April 27, 2001Publication date: December 13, 2001Applicant: Japan Aviation Electronics Industry LimitedInventors: Hiromi Oshima, Noboru Okino, Yasuhiro Kawata
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Patent number: 5841783Abstract: It is an object of the present invention to provide a repair address analysis system for a semiconductor test which can effect repair of a memory device from fails in a short time even when a fail is produced on a repair line. Fail count means effects counting of fail bits for an address value of a memory device and counting of fail bits of an address value of a repair line simultaneously with each other, and information of the repair line is replaced into the counted address.Type: GrantFiled: November 22, 1996Date of Patent: November 24, 1998Assignee: Advantest CorporationInventors: Toshikazu Suzuki, Yasuhiro Kawata
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Patent number: 5604756Abstract: A test data pattern, an address pattern and a control signal are applied to a memory under test (MUT) from a pattern generator (2). Data read out of the memory under test and expected data are compared by a logic comparator (4), which outputs a comparison signal indicating PASS or FAIL depending upon they match or not. When the logic comparator detect the match, the comparison signal is held in a register (42), from which it is outputted as an inhibit signal. The inhibit signal is applied to an inhibit gate (44) to cause it to inhibit the passage therethrough of a write enable signal to the memory under test, thereby preventing an excessive write in the memory.Type: GrantFiled: December 1, 1994Date of Patent: February 18, 1997Assignee: Advantest CorporationInventor: Yasuhiro Kawata
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Patent number: 5237208Abstract: In an apparatus for parallel operation of plural uninterruptable power source devices, each power source device includes at least one of an operation mode monitor for a logic operation on the output of the AC input monitoring circuit of each of the uninterruptable power source devices to feed the result thereof as a mode controlling signal to the mode controller, a parallel synchronizing signal generator for a logic operation on the output of an oscillating circuit which drives the invertor in each of the uninterruptable power source devices and, on detection of abnormality in the AC input, feeds the result thereof as a trigger pulse to the oscillating circuit, and a synchronization monitor for a logic operation on the output from the oscillating circuit in each of the uninterruptable power source devices and, when the differences between the phase of the output from the oscillating circuit of one of the triport uninterruptable power source devices and that from the oscillating circuits of remaining triport uType: GrantFiled: October 7, 1991Date of Patent: August 17, 1993Assignee: Nishimu Electronics Industries Co., Ltd.Inventors: Fukutoshi Tominaga, Yasuhiro Kawata, Hidehiro Koike
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Patent number: 4665322Abstract: An uninterruptible polyphase AC power supply equalizes an electric power taken out from a polyphase AC power source, even if unbalanced load is connected to output.Type: GrantFiled: October 29, 1985Date of Patent: May 12, 1987Assignee: Nishimu Electronics Industries, Co., Ltd.Inventors: Yoshinori Eishima, Yasuhiro Kawata