Abstract: A current control circuit for an ignition system (i.e., igniter current limiter) is disclosed. The current control circuit can reduce a coil current over a soft shut down (SSD) period using an insulated gate bipolar transistor (IGBT) that is controlled by a negative feedback loop, which controls the current limit of the IGBT according to a SSD profile. In order to prevent an unwanted current rise during the soft shut down period, the current control circuit compares a gate voltage of the IGBT to a reference signal and based on the comparison can enable the SSD profile to include a fast ramp. The fast ramp quickly lowers the current limit of the IGBT so that the coil current equals the current limit and can be controlled by the negative feedback loop.

Abstract: Various embodiments of the present technology comprise a method and apparatus for a current circuit. According to various embodiments, the current circuit may be utilized for current detection or current limiting. The current circuit may be configured to compensate for a base current, making detection of an input current more accurate.

Abstract: A current control circuit for an ignition system (i.e., igniter current limiter) is disclosed. The current control circuit can reduce a coil current over a soft shut down (SSD) period using an insulated gate bipolar transistor (IGBT) that is controlled by a negative feedback loop, which controls the current limit of the IGBT according to a SSD profile. In order to prevent an unwanted current rise during the soft shut down period, the current control circuit compares a gate voltage of the IGBT to a reference signal and based on the comparison can enable the SSD profile to include a fast ramp. The fast ramp quickly lowers the current limit of the IGBT so that the coil current equals the current limit and can be controlled by the negative feedback loop.

Abstract: A current control circuit for an ignition system (i.e., igniter current limiter) is disclosed. The current control circuit can reduce a coil current over a soft shut down (SSD) period using an insulated gate bipolar transistor (IGBT) that is controlled by a negative feedback loop, which controls the current limit of the IGBT according to a SSD profile. In order to prevent an unwanted current rise during the soft shut down period, the current control circuit compares a gate voltage of the IGBT to a reference signal and based on the comparison can enable the SSD profile to include a fast ramp. The fast ramp quickly lowers the current limit of the IGBT so that the coil current equals the current limit and can be controlled by the negative feedback loop.

Abstract: A current control circuit for an ignition system (i.e., igniter current limiter) is disclosed. The current control circuit can reduce a coil current over a soft shut down (SSD) period using an insulated gate bipolar transistor (IGBT) that is controlled by a negative feedback loop, which controls the current limit of the IGBT according to a SSD profile. In order to prevent an unwanted current rise during the soft shut down period, the current control circuit compares a gate voltage of the IGBT to a reference signal and based on the comparison can enable the SSD profile to include a fast ramp. The fast ramp quickly lowers the current limit of the IGBT so that the coil current equals the current limit and can be controlled by the negative feedback loop.

Abstract: A circuit and method for gradually reducing a coil current during a shutdown period is disclosed. The circuit and method include a controller that is configured in a control loop with a current sensor that measures the current in the coil and a transistor that can be controller to limit the current in the coil. The open-loop gain of the controller is determined by a resistance of a variable feedback resistor, and the resistance of the variable feedback resistor is reduced during the shutdown period as the coil current becomes small. The reduction of the resistance maintains a suitable phase margin by lowering the open loop gain of the circuit for low coil currents. Thus, during shutdown, the circuit provides control accuracy for high coil currents and control stability for low coil currents.

Abstract: A circuit and method for gradually reducing a coil current during a shutdown period is disclosed. The circuit and method include a controller that is configured in a control loop with a current sensor that measures the current in the coil and a transistor that can be controller to limit the current in the coil. The open-loop gain of the controller is determined by a resistance of a variable feedback resistor, and the resistance of the variable feedback resistor is reduced during the shutdown period as the coil current becomes small. The reduction of the resistance maintains a suitable phase margin by lowering the open loop gain of the circuit for low coil currents. Thus, during shutdown, the circuit provides control accuracy for high coil currents and control stability for low coil currents.

Abstract: A circuit and method for gradually reducing a coil current during a shutdown period is disclosed. The circuit and method include a controller that is configured in a control loop with a current sensor that measures the current in the coil and a transistor that can be controller to limit the current in the coil. The open-loop gain of the controller is determined by a resistance of a variable feedback resistor, and the resistance of the variable feedback resistor is reduced during the shutdown period as the coil current becomes small. The reduction of the resistance maintains a suitable phase margin by lowering the open loop gain of the circuit for low coil currents. Thus during shutdown, the circuit provides control accuracy for high coil currents and control stability for low coil currents.

Abstract: Various embodiments of the present technology comprise a method and apparatus for a current circuit. According to various embodiments, the current circuit may be utilized for current detection or current limiting. The current circuit may be configured to compensate for a base current, making detection of an input current more accurate.

Abstract: An amplifier circuit that is less likely to cause an error in a gain and a DC offset voltage and is suitable for reducing a size and power consumption is offered. A first resistor and a second resistor are connected in series between an input terminal and an output terminal. A third resistor and a fourth resistor are connected in series between a VREFL terminal and a VREFH terminal. A ratio of a resistance of the first resistor to a resistance of the second resistor is equal to a ratio of a resistance of the third resistor to a resistance of the fourth resistor. A voltage at a connecting node between the first resistor and the second resistor is applied to a first differential input terminal (?) of an operational amplifier, while either a voltage at a connecting node between the third resistor and the fourth resistor or VREFH is selectively applied to a second differential input terminal (+) of the operational amplifier.

Abstract: An amplifier circuit that is less likely to cause an error in a gain and a DC offset voltage and is suitable for reducing a size and power consumption is offered. A first resistor and a second resistor are connected in series between an input terminal and an output terminal. A third resistor and a fourth resistor are connected in series between a VREFL terminal and a VREFH terminal. A ratio of a resistance of the first resistor to a resistance of the second resistor is equal to a ratio of a resistance of the third resistor to a resistance of the fourth resistor. A voltage at a connecting node between the first resistor and the second resistor is applied to a first differential input terminal (?) of an operational amplifier, while either a voltage at a connecting node between the third resistor and the fourth resistor or VREFH is selectively applied to a second differential input terminal (+) of the operational amplifier.

Abstract: An automatic level control circuit comprises a level detection circuit which detects attack detection to sense a detection level greater than a predetermined level and recovery detection to sense a detection level smaller than the predetermined level, and a gain control circuit which outputs a gain adjustment control signal to regulate a gain of an variable gain amplifier such that an output signal from the variable gain amplifier is set to a predetermined signal level. The gain control circuit generates multiple candidate signals to change the gain at different response speeds, and selectively outputs, as a gain adjustment control signal, one of the candidate signals capable of providing the smallest value as the gain. Therefore, even when the gain is rapidly reduced by the attack action against a short-duration large signal, the gain can be returned to its original state at an appropriate speed.

Abstract: An automatic level control circuit comprises a gain controllable amplifier, a comparing and outputting circuit which compares a level of an output signal from the gain controllable amplifier with a reference level and outputs a result of comparison as a comparison result signal; an output signal restricting circuit which restricts the comparison result signal obtained in a period between one zero crossing point and another zero crossing point of the input signal such that a portion of the comparison result signal obtained within a predetermined output time is output, and an attack detecting and outputting circuit which restricts an output signal from the comparing and outputting circuit to the portion of the comparison output signal obtained within the predetermined time when the comparison result signal is output over the predetermined output time and outputs the restricted comparison result signal as an attack detection output signal.

Abstract: An automatic level control circuit comprises a gain controllable amplifier, a comparing and outputting circuit which compares a level of an output signal from the gain controllable amplifier with a reference level and outputs a result of comparison as a comparison result signal; an output signal restricting circuit which restricts the comparison result signal obtained in a period between one zero crossing point and another zero crossing point of the input signal such that a portion of the comparison result signal obtained within a predetermined output time is output, and an attack detecting and outputting circuit which restricts an output signal from the comparing and outputting circuit to the portion of the comparison output signal obtained within the predetermined time when the comparison result signal is output over the predetermined output time and outputs the restricted comparison result signal as an attack detection output signal.

Abstract: An automatic level control circuit comprises a level detection circuit which detects attack detection to sense a detection level greater than a predetermined level and recovery detection to sense a detection level smaller than the predetermined level, and a gain control circuit which outputs a gain adjustment control signal to regulate a gain of an variable gain amplifier such that an output signal from the variable gain amplifier is set to a predetermined signal level. The gain control circuit generates multiple candidate signals to change the gain at different response speeds, and selectively outputs, as a gain adjustment control signal, one of the candidate signals capable of providing the smallest value as the gain. Therefore, even when the gain is rapidly reduced by the attack action against a short-duration large signal, the gain can be returned to its original state at an appropriate speed.