Patents by Inventor Yasuhiro Nunomura

Yasuhiro Nunomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiprocessor system controlling frequency of clock input to processor according to ratio of processing times of processors, and method thereof
    Patent number: 6928566
    Abstract: The first processor controls the clock frequency control unit according to a ratio between an estimate of the processing time of the first program and an estimate of the processing time of the second program, to change the frequency of a clock being input into the first processor. In addition, the first processor controls the variable power source according to the frequency of the clock being input into the first processor, to change the power supply voltage being supplied to the first processor. Thus, the power consumption of the first processor can be reduced considerably.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: August 9, 2005
    Assignee: Renesas Technology Corp.
    Inventor: Yasuhiro Nunomura
  • Instruction code conversion apparatus creating an instruction code including a second code converted from a first code
    Patent number: 6871274
    Abstract: A processor includes a conversion table storage unit storing therein a table used to convert to a non-compressed instruction code from an index included in a compressed instruction code, and a conversion unit receiving a compressed instruction code to extract an index and a parameter therefrom to convert the extracted index to a non-compressed instruction code to incorporate the parameter into the obtained non-compressed instruction code to recover an instruction code for transmission to an instruction decode unit.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: March 22, 2005
    Assignee: Renesas Technology Corp.
    Inventor: Yasuhiro Nunomura
  • Instruction code conversion apparatus creating an instruction code including a second code converted from a first code
    Publication number: 20030135845
    Abstract: A processor includes a conversion table storage unit storing therein a table used to convert to a non-compressed instruction code from an index included in a compressed instruction code, and a conversion unit receiving a compressed instruction code to extract an index and a parameter therefrom to convert the extracted index to a non-compressed instruction code to incorporate the parameter into the obtained non-compressed instruction code to recover an instruction code for transmission to an instruction decode unit.
    Type: Application
    Filed: June 7, 2002
    Publication date: July 17, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yasuhiro Nunomura
  • Multiprocessor system controlling frequency of clock input to processor according to ratio of processing times of processors, and method thereof
    Publication number: 20020095610
    Abstract: The first processor controls the clock frequency control unit according to a ratio between an estimate of the processing time of the first program and an estimate of the processing time of the second program, to change the frequency of a clock being input into the first processor. In addition, the first processor controls the variable power source according to the frequency of the clock being input into the first processor, to change the power supply voltage being supplied to the first processor. Thus, the power consumption of the first processor can be reduced considerably.
    Type: Application
    Filed: August 14, 2001
    Publication date: July 18, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yasuhiro Nunomura
  • Software trap system which saves previous content of software trap handling pointer in a stack upon execution of a trap
    Patent number: 4942524
    Abstract: A computer has a software trap handling pointer for holding the storing location of the information saved in the memory. At the setting of a software trap, the information containing the content of the software trap handling pointer is saved in the memory by means of a stack mechanism, and a value indicating the saved location is stored in the software trap handling pointer. At the time of a software trap return, the information containing the content of the software trap handling pointer which has been stored at the setting of the software trap is restored by means of the stack mechanism.
    Type: Grant
    Filed: June 24, 1987
    Date of Patent: July 17, 1990
    Assignee: Mitsubishi Denki K.K.
    Inventor: Yasuhiro Nunomura