Abstract: Provided is a logic circuit including a first circuit including a static D flip-flop and a second circuit including a dynamic D flip-flop. The first circuit receives a clock signal and a first reset signal. The first circuit outputs a second reset signal generated by synchronizing the first reset signal with the clock signal. The second circuit receives the clock signal and a signal based on the second reset signal.

Abstract: A photoelectric conversion apparatus includes a first substrate including a pixel array including a plurality of pixels, a second substrate layered on the first substrate and including an AD conversion portion including a plurality of AD conversion circuits configured to convert a signal output from the first substrate into a digital signal, wherein the second substrate further includes a plurality of signal processing units including a first signal processing unit and a second signal processing unit both configured to perform machine learning processing, wherein each of a plurality of sets includes a plurality of AD conversion circuits that differ between the plurality of sets, wherein the first signal processing unit is arranged to correspond to one of the plurality of sets, and wherein the second signal processing unit is arranged to correspond to another one of the plurality of sets.

Abstract: A photoelectric conversion apparatus includes a second substrate including a signal processing circuit configured to perform signal processing using machine learning on a signal output from the first substrate. The second substrate is disposed on the first substrate in a multilayer structure. The signal processing circuit is so disposed to overlap with a pixel array but not overlap with a light-shielded pixel area as seen in a plan view.

Abstract: An image pickup device according to an embodiment includes pixels each configured to output an analog signal based on electric charges produced in a photoelectric conversion unit and a control unit configured to control a gain applied to the analog signal to be at least a first gain and a second gain greater than the first gain in accordance with a signal value of the analog signal. Each of the pixels outputs, as the analog signal, a first signal and a second signal based on electric charges produced in the photoelectric conversion unit in a first exposure period and a second exposure period shorter than the first exposure period. The control unit controls the gain applied to the analog signal by selecting one from the first gain and the second gain in accordance with the signal value, for at least one of the first signal and the second signal.

Abstract: Provided is a logic circuit including a first circuit including a static D flip-flop and a second circuit including a dynamic D flip-flop. The first circuit receives a clock signal and a first reset signal. The first circuit outputs a second reset signal generated by synchronizing the first reset signal with the clock signal. The second circuit receives the clock signal and a signal based on the second reset signal.

Abstract: A photoelectric conversion apparatus includes a first substrate including a pixel array including a plurality of pixels, a second substrate layered on the first substrate and including an AD conversion portion including a plurality of AD conversion circuits configured to convert a signal output from the first substrate into a digital signal, wherein the second substrate further includes a plurality of signal processing units including a first signal processing unit and a second signal processing unit both configured to perform machine learning processing, wherein each of a plurality of sets includes a plurality of AD conversion circuits that differ between the plurality of sets, wherein the first signal processing unit is arranged to correspond to one of the plurality of sets, and wherein the second signal processing unit is arranged to correspond to another one of the plurality of sets.

Abstract: A photoelectric conversion apparatus includes a second substrate including a signal processing circuit configured to perform signal processing using machine learning on a signal output from the first substrate. The second substrate is disposed on the first substrate in a multilayer structure. The signal processing circuit is so disposed to overlap with a pixel array but not overlap with a light-shielded pixel area as seen in a plan view.

Abstract: A photoelectric conversion device includes a first substrate including a pixel array portion, in which a plurality of photoelectric conversion portions is arranged in a two-dimensional array shape in planar view, and a first wiring pattern, and a second substrate including a machine learning portion configured to perform processing of a signal obtained from electric charge generated by the photoelectric conversion portions and a second wiring pattern, the first substrate and the second substrate being stacked on each other, wherein the first wiring pattern of the first substrate and the second wiring pattern of the second substrate are joined to each other to configure a metal joining portion, wherein a heat dissipation portion including the metal joining portion connected to the machine learning portion is located at a position overlapping the machine learning portion, and wherein the pixel array portion and the machine learning portion do not overlap each other.

Abstract: A photoelectric conversion device includes pixels forming columns, an amplifier, signal holding capacitors, switches, and a control unit. The pixels forming columns are configured to amplify, at multiple gains, a signal based on charge generated by a photoelectric converter of the pixel. The signal holding capacitors are provided in association with the columns. The switches control sample-and-hold operations to the signal holding capacitors on corresponding columns. The control unit supplies a control signal that controls the switches. The control unit supplies the control signal whose settling time when the switches transition from an on-state to an off-state is a first length and a second length when the signal amplified at a first gain and a second gain, respectively, is held in the signal holding capacitor. The second gain is higher than the first gain.

Abstract: A photoelectric conversion device includes pixels forming columns, an amplifier, signal holding capacitors, switches, and a control unit. The pixels forming columns are configured to amplify, at multiple gains, a signal based on charge generated by a photoelectric converter of the pixel. The signal holding capacitors are provided in association with the columns. The switches control sample-and-hold operations to the signal holding capacitors on corresponding columns. The control unit supplies a control signal that controls the switches. The control unit supplies the control signal whose settling time when the switches transition from an on-state to an off-state is a first length and a second length when the signal amplified at a first gain and a second gain, respectively, is held in the signal holding capacitor. The second gain is higher than the first gain.

Abstract: Disclosed embodiments perform readout at a high rate without being affected by transition of pixel transistors. A solid state imaging device of an embodiment has a pixel having a photoelectric conversion unit that generates charges, an amplification transistor including an input node that receives a signal based on the charges generated in the photoelectric conversion unit, and a reset transistor that resets the potential of the input node of the amplification transistor; a signal processing circuit that reads out a signal from the pixel via a signal line; and a switch provided between the signal line and an input node of the signal processing circuit, and a signal value of a control signal applied to the gate of the reset transistor changes while the switch is in the off-state.

Abstract: An image pickup device according to an embodiment includes pixels each configured to output an analog signal based on electric charges produced in a photoelectric conversion unit and a control unit configured to control a gain applied to the analog signal to be at least a first gain and a second gain greater than the first gain in accordance with a signal value of the analog signal. Each of the pixels outputs, as the analog signal, a first signal and a second signal based on electric charges produced in the photoelectric conversion unit in a first exposure period and a second exposure period shorter than the first exposure period. The control unit controls the gain applied to the analog signal by selecting one from the first gain and the second gain in accordance with the signal value, for at least one of the first signal and the second signal.

Abstract: An image pickup device according to an embodiment includes pixels each configured to output an analog signal based on electric charges produced in a photoelectric conversion unit and a control unit configured to control a gain applied to the analog signal to be at least a first gain and a second gain greater than the first gain in accordance with a signal value of the analog signal. Each of the pixels outputs, as the analog signal, a first signal and a second signal based on electric charges produced in the photoelectric conversion unit in a first exposure period and a second exposure period shorter than the first exposure period. The control unit controls the gain applied to the analog signal by selecting one from the first gain and the second gain in accordance with the signal value, for at least one of the first signal and the second signal.

Abstract: Disclosed embodiments perform readout at a high rate without being affected by transition of pixel transistors. A solid state imaging device of an embodiment has a pixel having a photoelectric conversion unit that generates charges, an amplification transistor including an input node that receives a signal based on the charges generated in the photoelectric conversion unit, and a reset transistor that resets the potential of the input node of the amplification transistor; a signal processing circuit that reads out a signal from the pixel via a signal line; and a switch provided between the signal line and an input node of the signal processing circuit, and a signal value of a control signal applied to the gate of the reset transistor changes while the switch is in the off-state.

Abstract: A solid-state imaging device includes pixels forming pixel rows, and a scanning circuit that performs a reset operation of a photoelectric converter and a readout operation of a pixel signal based on charges generated by the photoelectric converter including charge transfer from the photoelectric converter to the holding unit. The pixel rows include imaging rows and focus detection rows. The scanning circuit performs an image capture scan of the imaging rows and a focus detection scan of the focus detection rows, independently, such that signals of the focus detection rows are output after signals from the imaging rows. The scanning circuit performs the focus detection scan such that the reset operation on the focus detection row does not overlap with a charge transfer period on an imaging row belonging to a unit pixel row neighboring a unit pixel row to which a focus detection row under the reset operation belongs.

Abstract: An image capturing device includes reference pixels arranged in rows and configured to output pixel signals forming address signals indicating the positions of the rows to which the reference pixels belong, and a vertical scanning circuit having control signal output units each provided corresponding to the rows and each configured to output a control signal for controlling effective pixels and reference pixels of a corresponding one of the rows.

Abstract: An image capturing device includes reference pixels arranged in rows and configured to output pixel signals forming address signals indicating the positions of the rows to which the reference pixels belong, and a vertical scanning circuit having control signal output units each provided corresponding to the rows and each configured to output a control signal for controlling effective pixels and reference pixels of a corresponding one of the rows.

Abstract: A solid-state imaging device includes pixels forming pixel rows, and a scanning circuit that performs a reset operation of a photoelectric converter and a readout operation of a pixel signal based on charges generated by the photoelectric converter including charge transfer from the photoelectric converter to the holding unit. The pixel rows include imaging rows and focus detection rows. The scanning circuit performs an image capture scan of the imaging rows and a focus detection scan of the focus detection rows, independently, such that signals of the focus detection rows are output after signals from the imaging rows. The scanning circuit performs the focus detection scan such that the reset operation on the focus detection row does not overlap with a charge transfer period on an imaging row belonging to a unit pixel row neighboring a unit pixel row to which a focus detection row under the reset operation belongs.

Abstract: An image pickup device according to an embodiment includes pixels each configured to output an analog signal based on electric charges produced in a photoelectric conversion unit and a control unit configured to control a gain applied to the analog signal to be at least a first gain and a second gain greater than the first gain in accordance with a signal value of the analog signal. Each of the pixels outputs, as the analog signal, a first signal and a second signal based on electric charges produced in the photoelectric conversion unit in a first exposure period and a second exposure period shorter than the first exposure period. The control unit controls the gain applied to the analog signal by selecting one from the first gain and the second gain in accordance with the signal value, for at least one of the first signal and the second signal.

Abstract: An image pickup apparatus includes a pixel array including a plurality of pixels arranged in a plurality of rows and a plurality of columns, and a plurality of column signal processing circuits provided respectively for the columns of the pixel array, each being configured to receive output signals from the pixels and an analog signal varying with time. The plurality of column signal processing circuits include a first column signal processing circuit and a second column signal processing circuit configured such that each of the first column signal processing circuit and the second column signal processing circuit is configured to be independently switched between a driving state and a power saving state. A signal line for supplying the analog signal to the first column signal processing circuit and a signal line for supplying the analog signal to the second column signal processing circuit are electrically isolated from each other.