Patents by Inventor Yasuhiro Soeda

Yasuhiro Soeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11837301
    Abstract: A substrate includes a plurality of memory units each including an anti-fuse element and a switching element configured to switch application of a predetermined voltage to the anti-fuse element, a wiring to which the plurality of memory units are connected, a first electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied, and a second electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: December 5, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masashi Fukuda, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20230074434
    Abstract: According to the present invention, it is possible to provide an element substrate and a print head with which a decrease in yield and an increase in cost in a manufacturing process can be suppressed. For that purpose, a VH wiring line and a GNDH wiring line are provided in parallel in the same layer.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 9, 2023
    Inventors: Yosuke Miura, Yasuo Fujii, Yasuhiro Soeda
  • Publication number: 20220288924
    Abstract: An element substrate comprises a plurality of stages of shift registers that inputs and holds a serial data signal; a latch circuit that latches the serial data held by the shift registers; a decoder circuit that inputs an output of the latch circuit and outputs a selection signal for selecting a block of the print elements or the memory elements; and a mask circuit that masks the output of the selection signal for selecting the block of the memory elements from the decoder circuit in accordance with an input bit data signal. The block of the print elements or the memory elements includes a plurality of print elements or memory elements in which one element is selected in each of the plurality of groups.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 15, 2022
    Inventors: Soichiro Nagamochi, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220293199
    Abstract: A switch is configured to switch connection between a second terminal to which a data signal is input and a memory control signal of a memory element in accordance with a switching signal included in a data signal. In write to a memory element, the switching signal switches such that the switch connects the second terminal and the memory control signal of the memory element, and a pulse signal for the write to the memory element is input via the second terminal.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 15, 2022
    Inventors: Suguru Taniguchi, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220293201
    Abstract: A device, comprising a plurality of units arrayed in a predetermined direction, a first terminal configured to supply a voltage to the plurality of units, and a second terminal configured to supply a voltage to the plurality of units, wherein the plurality of units include a first unit including a memory element arranged between the first terminal and the second terminal, and a first transistor configured to perform write to the memory element, and a second unit including a second transistor arranged between the first terminal and the second terminal in correspondence with the first transistor of the first unit.
    Type: Application
    Filed: March 4, 2022
    Publication date: September 15, 2022
    Inventors: Sadayoshi Sakuma, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220293200
    Abstract: A substrate includes a plurality of memory units each including an anti-fuse element and a switching element configured to switch application of a predetermined voltage to the anti-fuse element, a wiring to which the plurality of memory units are connected, a first electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied, and a second electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied.
    Type: Application
    Filed: March 3, 2022
    Publication date: September 15, 2022
    Inventors: Masashi Fukuda, Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220266590
    Abstract: An element substrate including a liquid discharge element, comprising a memory element capable of storing individual information of the element substrate by a write, the memory element being configured to change an impedance value by the write, a plurality of current supply elements capable of supplying a current to the memory element, and a determination unit configured to determine presence/absence of the write based on a voltage generated in the memory element by the current selectively supplied from the plurality of current supply elements, wherein the plurality of current supply elements constitute a part of a current mirror circuit and each supply the current in an amount according to a size ratio to the memory element.
    Type: Application
    Filed: February 11, 2022
    Publication date: August 25, 2022
    Inventors: Toshio Negishi, Yasuhiro Soeda
  • Publication number: 20220184952
    Abstract: Provided is a technique that enables voltages to be applied, with high precision, to an electrode layer for inhibition and removal of koge while suppressing increase in the size a substrate. A liquid ejection head substrate includes: electrothermal conversion elements that apply heat to a liquid; an upper electrode part in which a plurality of upper electrodes that protect the electrothermal conversion elements are formed at positions where the upper electrodes come into contact with the liquid; a counter electrode part which is provided to correspond to the upper electrode part and in which a plurality of counter electrodes are formed to be electrically connectable to the upper electrodes via the liquid; and a generation unit that generates a voltage to be applied to at least one of the upper electrode part and the counter electrode part.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 16, 2022
    Inventors: YASUO FUJII, YASUHIRO SOEDA, YOSUKE MIURA
  • Patent number: 10126190
    Abstract: A capacitive force sensor 101 of the present invention includes a plurality of cells each including a lower electrode 104, a movable member that includes an upper electrode 107 and has flexibility, and a support 105b arranged to movably support the movable member and to form a gap 106 between the upper and the lower electrodes. The plural cells are grouped into elements each including one or more of the cells, and the one or more cells in a same element are electrically connected to each other.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: November 13, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuhiro Soeda, Yasuhiro Shimada
  • Publication number: 20170074734
    Abstract: A capacitive force sensor 101 of the present invention includes a plurality of cells each including a lower electrode 104, a movable member that includes an upper electrode 107 and has flexibility, and a support 105b arranged to movably support the movable member and to form a gap 106 between the upper and the lower electrodes. The plural cells are grouped into elements each including one or more of the cells, and the one or more cells in a same element are electrically connected to each other.
    Type: Application
    Filed: April 24, 2015
    Publication date: March 16, 2017
    Inventors: Yasuhiro Soeda, Yasuhiro Shimada
  • Patent number: 8754490
    Abstract: An element array comprises a plurality of elements having a first electrode and a second electrode with a gap therebetween; the first electrode is separated for each of the elements by grooves, an insulating connection substrate is bonded to the first electrode, and wirings are provided from the respective first electrodes through the connection substrate to the side opposite to the first electrodes.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: June 17, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takahiro Ezaki, Chienliu Chang, Yasuhiro Soeda, Kenji Tamamori
  • Patent number: 8665672
    Abstract: A process for producing a capacitive electromechanical conversion device by bonding together a substrate and a membrane member to form a cavity sealed between the substrate and the membrane member, the process for producing a capacitive electromechanical conversion device comprises the steps of: providing a gas release path penetrating from a bonded interface between the substrate and the membrane member to the outside, and forming the cavity by bonding the membrane member with the substrate with the gas release path provided; the gas release path being provided at a location where the path does not communicate with the cavity.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: March 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuhiro Soeda, Takahiro Ezaki
  • Publication number: 20130321039
    Abstract: A measuring device comprises a plurality of variable capacitors as sensor elements. The plurality of variable capacitors are provided with a drive circuit for each pair. The first electrodes of the two variable capacitors in each pair are electrically connected to each other. The drive circuit for each pair includes a bias supply for applying two AC bias voltages relatively 90° out of phase to the second electrodes respectively of the two variable capacitors to produce an output signal at the first electrodes connected to each other, a multiplier for multiplying the output signal by two AC signals relatively 90° out of phase to produce two multiplication signals, and an integrator for integrating the two multiplication signals for each cycle of the corresponding AC bias voltages to acquire two integration signals for the two variable capacitors.
    Type: Application
    Filed: May 17, 2013
    Publication date: December 5, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Yasuhiro Soeda
  • Publication number: 20130313663
    Abstract: Provided is a capacitive electromechanical transducer manufactured by fusion bonding, which is capable of enhancing the performance by reducing fluctuations in initial deformation among diaphragms caused at positions having difference boundary conditions such as the bonding area. The capacitive electromechanical transducer includes a device, the device including at least one cellular structure including: a silicon substrate; a diaphragm; and a diaphragm supporting portion configured to support the diaphragm so that a gap is formed between one surface of the silicon substrate and the diaphragm. The device has, in its periphery, a groove formed in a layer shared with the diaphragm supporting portion.
    Type: Application
    Filed: January 16, 2012
    Publication date: November 28, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ayako Kato, Kazutoshi Torashima, Yasuhiro Soeda, Shinichiro Watanabe
  • Publication number: 20130302934
    Abstract: Provided is a method of manufacturing a capacitive electromechanical transducer using fusion bonding, which is capable of reducing fluctuations in initial deformation among diaphragms caused at positions having different boundary conditions such as the bonding area, thereby enhancing the uniformity of the transducer and stabilizing the sensitivity and the like. The method of manufacturing a capacitive electromechanical transducer includes: forming an insulating layer on a first silicon substrate and forming at least one recess; fusion bonding a second silicon substrate onto the insulating layer; and thinning the second silicon substrate and forming a silicon film. The method further includes, before the bonding of the second silicon substrate onto the insulating layer, forming a groove in the insulating layer at the periphery of the at least one recess.
    Type: Application
    Filed: January 24, 2012
    Publication date: November 14, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ayako Kato, Kazutoshi Torashima, Yasuhiro Soeda, Shinichiro Watanabe
  • Publication number: 20130256817
    Abstract: An element array comprises a plurality of elements having a first electrode and a second electrode with a gap therebetween; the first electrode is separated for each of the elements by grooves, an insulating connection substrate is bonded to the first electrode, and wirings are provided from the respective first electrodes through the connection substrate to the side opposite to the first electrodes.
    Type: Application
    Filed: May 31, 2013
    Publication date: October 3, 2013
    Inventors: Takahiro Ezaki, Chienliu Chang, Yasuhiro Soeda, Kenji Tamamori
  • Patent number: 8466522
    Abstract: An element array comprises a plurality of elements having a first electrode and a second electrode with a gap therebetween; the first electrode is separated for each of the elements by grooves, an insulating connection substrate is bonded to the first electrode, and wirings are provided from the respective first electrodes through the connection substrate to the side opposite to the first electrodes.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: June 18, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takahiro Ezaki, Chienliu Chang, Yasuhiro Soeda, Kenji Tamamori
  • Patent number: 8344587
    Abstract: A capacitive electro-mechanical transducer includes a plurality of cavities, a communicating portion for connecting the cavities to each other, and two electrodes sandwiching each of the cavities. The cavities are sealed from outside, and at least a portion of the communicating portion is closed to interrupt the communication between the cavities through the communicating portion.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: January 1, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yasuhiro Soeda
  • Publication number: 20110084570
    Abstract: A process for producing a capacitive electromechanical conversion device by bonding together a substrate and a membrane member to form a cavity sealed between the substrate and the membrane member, the process for producing a capacitive electromechanical conversion device comprises the steps of: providing a gas release path penetrating from a bonded interface between the substrate and the membrane member to the outside, and forming the cavity by bonding the membrane member with the substrate with the gas release path provided; the gas release path being provided at a location where the path does not communicate with the cavity.
    Type: Application
    Filed: June 4, 2009
    Publication date: April 14, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yasuhiro Soeda, Takahiro Ezaki
  • Publication number: 20110073968
    Abstract: An element array comprises a plurality of elements having a first electrode and a second electrode with a gap therebetween; the first electrode being separated for each of the elements by grooves, an insulating connection substrate being bonded to the first electrode, and a wiring being made from each of the respective first electrodes separated for each of the elements through the connection substrate to the side opposite to the first electrodes.
    Type: Application
    Filed: June 29, 2009
    Publication date: March 31, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takahiro Ezaki, Chienliu Chang, Yasuhiro Soeda, Kenji Tamamori