Abstract: Provided is a temperature detecting circuit for printing element board including: one or more diode elements for detecting temperature of a printing element board; a terminal configured to receive, as an input, a voltage appearing at a first terminal of each of the diode elements; a connecting unit configured to electrically connect the first terminal and the terminal; and a capacitive element located close to the diode element and connected in parallel to the diode element.

Abstract: The purpose of the present disclosure is to provide a print element substrate capable of accurately detecting temperature over the entire area and performing high-precision temperature control. The print element substrate includes an energy generating element array, a temperature detection element array, a heating element array, and a plurality of unit areas each including an energy generating element, a temperature detection element, and a heating element. Among the plurality of unit areas, compared to a first unit area arranged in a near of a center of the print element substrate, in a second unit area arranged at a position near a first end portion of the print element substrate, the temperature detection element is arranged at a position close to the first end portion.

Abstract: A switch is configured to switch connection between a second terminal to which a data signal is input and a memory control signal of a memory element in accordance with a switching signal included in a data signal. In write to a memory element, the switching signal switches such that the switch connects the second terminal and the memory control signal of the memory element, and a pulse signal for the write to the memory element is input via the second terminal.

Abstract: A device, comprising a plurality of units arrayed in a predetermined direction, a first terminal configured to supply a voltage to the plurality of units, and a second terminal configured to supply a voltage to the plurality of units, wherein the plurality of units include a first unit including a memory element arranged between the first terminal and the second terminal, and a first transistor configured to perform write to the memory element, and a second unit including a second transistor arranged between the first terminal and the second terminal in correspondence with the first transistor of the first unit.

Abstract: Provided is a technique that enables voltages to be applied, with high precision, to an electrode layer for inhibition and removal of koge while suppressing increase in the size a substrate. A liquid ejection head substrate includes: electrothermal conversion elements that apply heat to a liquid; an upper electrode part in which a plurality of upper electrodes that protect the electrothermal conversion elements are formed at positions where the upper electrodes come into contact with the liquid; a counter electrode part which is provided to correspond to the upper electrode part and in which a plurality of counter electrodes are formed to be electrically connectable to the upper electrodes via the liquid; and a generation unit that generates a voltage to be applied to at least one of the upper electrode part and the counter electrode part.

Abstract: A recording element substrate includes a nozzle, an energy generating portion, a latch input terminal which inputs a latch signal, a data input terminal which inputs a data signal for controlling a drive state of the energy generating portion, a heat-pulse generation circuit which generates a heat-pulse signal determining a drive timing of the energy generating portion, a latch circuit to which the data signal is transferred from the data input terminal and which inputs the data signal at a timing when the latch signal is input, a drive element which is a drive element to which the heat-pulse signal and the data signal are transferred and which outputs a drive signal determining a drive state of the energy generating portion by a logical product of the heat-pulse signal and the data signal, and a delay circuit which delays the latch signal and inputs it to the latch circuit.

Abstract: Provided is a technique that enables voltages to be applied, with high precision, to an electrode layer for inhibition and removal of koge while suppressing increase in the size a substrate. A liquid ejection head substrate includes: electrothermal conversion elements that apply heat to a liquid; an upper electrode part in which a plurality of upper electrodes that protect the electrothermal conversion elements are formed at positions where the upper electrodes come into contact with the liquid; a counter electrode part which is provided to correspond to the upper electrode part and in which a plurality of counter electrodes are formed to be electrically connectable to the upper electrodes via the liquid; and a generation unit that generates a voltage to be applied to at least one of the upper electrode part and the counter electrode part.

Abstract: One embodiment of the present invention provides a method of sending print data, including: generating a first data part with a fixed data length; generating a second data part with a variable data length; and combining the first and second data parts in a predetermined order and sending the resulting print data. The first data part includes multiple information pieces. The second data part is capable of including multiple additional information pieces. A first information piece included in the first data part indicates presence or absence of each additional information piece in the second data part. The second information piece includes multiple pieces of synthesized data. In the sending, the multiple pieces of synthesized data are each subjected to bit division, and portions of the pieces of synthesized data subjected to the bit division which have a smaller bit length are continuously arranged in a single packet.

Abstract: A switch is configured to switch connection between a second terminal to which a data signal is input and a memory control signal of a memory element in accordance with a switching signal included in a data signal. In write to a memory element, the switching signal switches such that the switch connects the second terminal and the memory control signal of the memory element, and a pulse signal for the write to the memory element is input via the second terminal.

Abstract: According to the present invention, it is possible to provide an element substrate and a print head with which a decrease in yield and an increase in cost in a manufacturing process can be suppressed. For that purpose, a VH wiring line and a GNDH wiring line are provided in parallel in the same layer.

Abstract: A switch is configured to switch connection between a second terminal to which a data signal is input and a memory control signal of a memory element in accordance with a switching signal included in a data signal. In write to a memory element, the switching signal switches such that the switch connects the second terminal and the memory control signal of the memory element, and a pulse signal for the write to the memory element is input via the second terminal.

Abstract: An element substrate comprises a plurality of stages of shift registers that inputs and holds a serial data signal; a latch circuit that latches the serial data held by the shift registers; a decoder circuit that inputs an output of the latch circuit and outputs a selection signal for selecting a block of the print elements or the memory elements; and a mask circuit that masks the output of the selection signal for selecting the block of the memory elements from the decoder circuit in accordance with an input bit data signal. The block of the print elements or the memory elements includes a plurality of print elements or memory elements in which one element is selected in each of the plurality of groups.

Abstract: An element substrate including a liquid discharge element, comprising a memory element capable of storing individual information of the element substrate by a write, the memory element being configured to change an impedance value by the write, a plurality of current supply elements capable of supplying a current to the memory element, and a determination unit configured to determine presence/absence of the write based on a voltage generated in the memory element by the current selectively supplied from the plurality of current supply elements, wherein the plurality of current supply elements constitute a part of a current mirror circuit and each supply the current in an amount according to a size ratio to the memory element.

Abstract: A substrate includes a plurality of memory units each including an anti-fuse element and a switching element configured to switch application of a predetermined voltage to the anti-fuse element, a wiring to which the plurality of memory units are connected, a first electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied, and a second electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied.

Abstract: According to the present invention, it is possible to provide an element substrate and a print head with which a decrease in yield and an increase in cost in a manufacturing process can be suppressed. For that purpose, a VH wiring line and a GNDH wiring line are provided in parallel in the same layer.

Abstract: An element substrate comprises a plurality of stages of shift registers that inputs and holds a serial data signal; a latch circuit that latches the serial data held by the shift registers; a decoder circuit that inputs an output of the latch circuit and outputs a selection signal for selecting a block of the print elements or the memory elements; and a mask circuit that masks the output of the selection signal for selecting the block of the memory elements from the decoder circuit in accordance with an input bit data signal. The block of the print elements or the memory elements includes a plurality of print elements or memory elements in which one element is selected in each of the plurality of groups.

Abstract: A substrate includes a plurality of memory units each including an anti-fuse element and a switching element configured to switch application of a predetermined voltage to the anti-fuse element, a wiring to which the plurality of memory units are connected, a first electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied, and a second electrode pad to which a voltage for supplying the predetermined voltage to the wiring is applied.

Abstract: A device, comprising a plurality of units arrayed in a predetermined direction, a first terminal configured to supply a voltage to the plurality of units, and a second terminal configured to supply a voltage to the plurality of units, wherein the plurality of units include a first unit including a memory element arranged between the first terminal and the second terminal, and a first transistor configured to perform write to the memory element, and a second unit including a second transistor arranged between the first terminal and the second terminal in correspondence with the first transistor of the first unit.

Abstract: A switch is configured to switch connection between a second terminal to which a data signal is input and a memory control signal of a memory element in accordance with a switching signal included in a data signal. In write to a memory element, the switching signal switches such that the switch connects the second terminal and the memory control signal of the memory element, and a pulse signal for the write to the memory element is input via the second terminal.

Abstract: An element substrate including a liquid discharge element, comprising a memory element capable of storing individual information of the element substrate by a write, the memory element being configured to change an impedance value by the write, a plurality of current supply elements capable of supplying a current to the memory element, and a determination unit configured to determine presence/absence of the write based on a voltage generated in the memory element by the current selectively supplied from the plurality of current supply elements, wherein the plurality of current supply elements constitute a part of a current mirror circuit and each supply the current in an amount according to a size ratio to the memory element.