Abstract: A lead frame includes: a die pad for holding a semiconductor chip; a radiator plate extending outward from one side face of the die pad and another side face thereof opposite the one side; a plurality of inner leads arranged opposite respective sides of the die pad other than the sides from which the radiator plate extends so as to interpose the die pad; and a plurality of outer leads formed outside the plurality of inner leads and connected to the inner leads. At least one of the plurality of inner leads serves as a ground lead connected to the die pad. In the radiator plate, an island bonding area of which potential is equal to that of the die pad is formed, a first slit is formed around three sides of the island bonding area, and the other side is connected to the radiator plate through a joint part.

Abstract: P-type buried regions 104a and 104b are formed in an extended drain region 102 formed in a P-type semiconductor substrate 110. An N-type buried region 113 is formed between the P-type buried regions 104a and 104b. An N-type impurity concentration of the N-type buried region 113 along a G–G? plane is low in the vicinity of boundaries between the N-type buried region 113 and the P-type buried regions 104a and 104b and is increased from the boundaries to an inside of the N-type buried region 113.

Abstract: P-type buried regions 104a and 104b are formed in an extended drain region 102 formed in a P-type semiconductor substrate 110. An N-type buried region 113 is formed between the P-type buried regions 104a and 104b. An N-type impurity concentration of the N-type buried region 113 along a G-G? plane is low in the vicinity of boundaries between the N-type buried region 113 and the P-type buried regions 104a and 104b and is increased from the boundaries to an inside of the N-type buried region 113.