Patents by Inventor Yasuhiro Tsujita

Yasuhiro Tsujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory and process for fabricating the same
    Patent number: 6887752
    Abstract: In a semiconductor memory, a barrier layer formed of a first metal film, a metal nitride film and a second metal film laminated in the named order is formed under a lower electrode of a ferroelectric capacitor in a memory cell, in order to minimize a pealing and lifting of the lower electrode from an underlying plug in the process of forming a ferroelectric material film as a capacitor dielectric film and in its succeeding annealing process. The metal nitride film is formed of a nitride of a metal constituting the first or second metal film.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: May 3, 2005
    Assignee: NEC Electronics Corporation
    Inventors: Sota Shinohara, Koichi Takemura, Yasuhiro Tsujita, Hidemitsu Mori
  • Semiconductor memory and process for fabricating the same
    Patent number: 6730955
    Abstract: In a semiconductor memory, a barrier layer formed of a first metal film, a metal nitride film and a second metal film laminated in the named order is formed under a lower electrode of a ferroelectric capacitor in a memory cell, in order to minimize a pealing and lifting of the lower electrode from an underlying plug in the process of forming a ferroelectric material film as a capacitor dielectric film and in its succeeding annealing process. The metal nitride film is formed of a nitride of a metal constituting the first or second metal film.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: May 4, 2004
    Assignee: NEC Electronics Corporation
    Inventors: Sota Shinohara, Koichi Takemura, Yasuhiro Tsujita, Hidemitsu Mori
  • Semiconductor memory and process for fabricating the same
    Publication number: 20040079982
    Abstract: In a semiconductor memory, a barrier layer formed of a first metal film, a metal nitride film and a second metal film laminated in the named order is formed under a lower electrode of a ferroelectric capacitor in a memory cell, in order to minimize a pealing and lifting of the lower electrode from an underlying plug in the process of forming a ferroelectric material film as a capacitor dielectric film and in its succeeding annealing process. The metal nitride film is formed of a nitride of a metal constituting the first or second metal film.
    Type: Application
    Filed: October 21, 2003
    Publication date: April 29, 2004
    Inventors: Sota Shinohara, Koichi Takemura, Yasuhiro Tsujita, Hidemitsu Mori
  • Semiconductor memory and process for fabricating the same
    Publication number: 20020132426
    Abstract: In a semiconductor memory, a barrier layer formed of a first metal film, a metal nitride film and a second metal film laminated in the named order is formed under a lower electrode of a ferroelectric capacitor in a memory cell, in order to minimize a pealing and lifting of the lower electrode from an underlying plug in the process of forming a ferroelectric material film as a capacitor dielectric film and in its succeeding annealing process. The metal nitride film is formed of a nitride of a metal constituting the first or second metal film.
    Type: Application
    Filed: March 18, 2002
    Publication date: September 19, 2002
    Applicant: NEC CORPORATION
    Inventors: Sota Shinohara, Koichi Takemura, Yasuhiro Tsujita, Hidemitsu Mori