Patents by Inventor Yasuhiro Tsunemi

Yasuhiro Tsunemi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of mounting electronic circuit chip
    Patent number: 7549208
    Abstract: In a method of mounting a planar electronic circuit chip onto a flexible sheet together with another planar electronic element, the electronic circuit part and the another electric element are selected so that the planar surface of the another electric element is greater than the planar surface of the electronic circuit chip, and the another electric element and the electronic circuit chip are mounted on the sheet so that the planar surface of the another electric element and the planar surface of the electronic circuit chip are in parallel with the sheet surface, and the planer surface of the electronic circuit chip is accommodated within the planar surface of the another electric element as viewed in a direction perpendicular to the sheet surface.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: June 23, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Chikashi Okamoto, Kazuo Takaragi, Kazutaka Tsuji, Mitsuo Usami, Chizuko Yasunobu, Asahiko Sobe, Yasuhiro Tsunemi, Hiroyuki Yagi
  • Method of checking authenticity of sheet with built-in electronic circuit chip
    Patent number: 7309019
    Abstract: A method of checking a sheet as to forgery thereof, the sheet being provided with an electronic circuit chip from or in which information can be read out or written and having visible information. The method includes a step of encrypting the visible information of the sheet and storing the encrypted visible information in the electronic circuit chip, and a step of determining discriminatively the authenticity of the sheet by comparing the visible information of the sheet with the information stored in the electronic circuit chip.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: December 18, 2007
    Assignees: Hitachi, Ltd., Hitachi Research Institute
    Inventors: Chikashi Okamoto, Kazuo Takaragi, Kazutaka Tsuji, Mitsuo Usami, Chizuko Yasunobu, Asahiko Isobe, Yasuhiro Tsunemi, Hiroyuki Yagi
  • Method of checking authenticity of sheet with built-in electronic circuit chip
    Publication number: 20060108412
    Abstract: A method of checking sheets as to forgery thereof, the sheet being provided with an electronic circuit chip from or in which information can be read out or written and having visible information. The method includes a step of encrypting the visible information of the sheet and storing the encrypted visible information in the electronic circuit chip, and a step of determining discriminatively the authenticity of the sheet by comparing the visible information of the sheet with the information stored in the electronic circuit chip.
    Type: Application
    Filed: January 4, 2006
    Publication date: May 25, 2006
    Inventors: Chikashi Okamoto, Kazuo Takaragi, Kazutaka Tsuji, Mitsuo Usami, Chizuko Yasunobu, Asahiko Isobe, Yasuhiro Tsunemi, Hiroyuki Yagi
  • Method of checking authenticity of sheet with built-in electronic circuit chip
    Patent number: 7007854
    Abstract: A method of checking sheets as to forgery thereof, the sheet being provided with an electronic circuit chip from which information can be read cut or written and having visible information. The method includes a step of encrypting the visible information of the sheet and storing the encrypted visible information in the electronic circuit chip, and a step of determining discriminatively the authenticity of the sheet by comparing the visible information of the sheet with the information stored in the electronic circuit chip.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: March 7, 2006
    Assignees: Hitachi, Ltd., Hitachi Research Institute
    Inventors: Chikashi Okamoto, Kazuo Takaragi, Kazutaka Tsuji, Mitsuo Usami, Chizuko Yasunobu, Asahiko Isobe, Yasuhiro Tsunemi, Hiroyuki Yagi
  • Method of mounting electronic circuit chip
    Publication number: 20040156176
    Abstract: In a method of mounting a planar electronic circuit chip onto a flexible sheet together with another planar electronic element, the electronic circuit part and the another electric element are selected so that the planar surface of the another electric element is greater than the planar surface of the electronic circuit chip, and the another electric element and the electronic circuit chip are mounted on the sheet so that the planar surface of the another electric element and the planar surface of the electronic circuit chip are in parallel with the sheet surface, and the planer surface of the electronic circuit chip is accommodated within the planar surface of the another electric element as viewed in a direction perpendicular to the sheet surface.
    Type: Application
    Filed: October 20, 2003
    Publication date: August 12, 2004
    Applicant: HITACHI, LTD.
    Inventors: Chikashi Okamoto, Kazuo Takaragi, Kazutaka Tsuji, Mitsuo Usami, Chizuko Yasunobu, Asahiko Isobe, Yasuhiro Tsunemi, Hiroyuki Yagi
  • Method for mounting electronic circuit chip
    Patent number: 6731509
    Abstract: In a method of mounting a planar electronic circuit chip onto a flexible sheet together with another planar electronic element, the electronic circuit part and the another electric element are selected so that the planar surface of the another electric element is greater than the planar surface of the electronic circuit chip, and the another electric element and the electronic circuit chip are mounted on the sheet so that the planar surface of the another electric element and the planar surface of the electronic circuit chip are in parallel with the sheet surface, and the planer surface of the electronic circuit chip is accommodated within the planar surface of the another electric element as viewed in a direction perpendicular to the sheet surface.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: May 4, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Chikashi Okamoto, Kazuo Takaragi, Kazutaka Tsuji, Mitsuo Usami, Chizuko Yasunobu, Asahiko Sobe, Yasuhiro Tsunemi, Hiroyuki Yagi
  • Method of checking authenticity of sheet with built-in electronic circuit chip
    Publication number: 20040060978
    Abstract: A method of checking sheets as to forgery thereof, the sheet being provided with an electronic circuit chip from or in which information can be read out or written and having visible information.
    Type: Application
    Filed: September 30, 2003
    Publication date: April 1, 2004
    Applicants: HITACHI, LTD., HITACHI RESEARCH INSTITUTE
    Inventors: Chikashi Okamoto, Kazuo Takaragi, Kazutaka Tsuji, Mitsuo Usami, Chizuko Yasunobu, Asahiko Isobe, Yasuhiro Tsunemi, Hiroyuki Yagi
  • Method of checking authenticity of sheet with built-in electronic circuit chip
    Patent number: 6659353
    Abstract: A method of checking sheets as to forgery thereof, the sheet being provided with an electronic circuit chip from which information can be read out or written and having visible information. The method includes a step of encrypting the visible information of the sheet and storing the encrypted visible information in the electronic circuit chip, and a step of determining discriminatively the authenticity of the sheet by comparing the visible information of the sheet with the information stored in the electronic circuit chip.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: December 9, 2003
    Assignees: Hitachi, Ltd., Hitachi Research Institute
    Inventors: Chikashi Okamoto, Kazuo Takaragi, Kazutaka Tsuji, Mitsuo Usami, Chizuko Yasunobu, Asahiko Isobe, Yasuhiro Tsunemi, Hiroyuki Yagi