Patents by Inventor Yasuhiro Uno

Yasuhiro Uno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142899
    Abstract: The intermediate transfer unit includes: an endless intermediate transfer belt which is turned around while carrying a toner image on its outer circumferential surface; and a plurality of rollers on which the intermediate transfer belt is turnably stretched, wherein the intermediate transfer belt has, on its inner circumferential surface, an information recording area in which belt information has been recorded, and the intermediate transfer belt has a mark at a position in the outer circumferential surface where a positional relationship between the mark and the information recording area comes to a specified relationship.
    Type: Application
    Filed: October 19, 2023
    Publication date: May 2, 2024
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Keisuke OBA, Koji UNO, Yasuhiro MICHISHITA
  • Publication number: 20240080553
    Abstract: A camera system includes a camera body, a lens barrel that is mounted to the camera body and includes at least one movable lens, and a zoom ring drive device that is mounted to the camera body. A first control unit of the camera body controls a second control unit of the lens barrel and a third control unit of the zoom ring drive device so as to move a zoom lens with a DC motor on the basis of information about the characteristic of the zoom lens and an optical characteristic value inputted to an input unit.
    Type: Application
    Filed: May 2, 2023
    Publication date: March 7, 2024
    Applicant: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Yasuhiro SHINGU, Tetsuya UNO
  • Patent number: 9381974
    Abstract: An electric derailleur motor unit includes a base member, a motor, an output shaft, and a drive train. The motor is mounted to the base member. The motor has a motor shaft rotatable about a first rotational axis. The output shaft is rotatable about a second rotational axis. The drive train is operatively disposed between the motor shaft of the motor and the output shaft. The drive train includes an anti-backdriving device. The anti-backdriving device is configured to transmit rotation of the motor shaft of the motor in both rotational directions about the first rotational axis to the output shaft. The anti-backdriving device is further configured to prevent the output shaft from rotating in both rotational directions about the second rotational axis while the output shaft receives an external rotational torque from outside of the electric derailleur motor unit.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: July 5, 2016
    Assignee: Shimano Inc.
    Inventors: Takafumi Katsura, Kensuke Tagaya, Hisashi Kawamoto, Yasuhiro Uno
  • Publication number: 20140121047
    Abstract: An electric derailleur motor unit includes a base member, a motor, an output shaft, and a drive train. The motor is mounted to the base member. The motor has a motor shaft rotatable about a first rotational axis. The output shaft is rotatable about a second rotational axis. The drive train is operatively disposed between the motor shaft of the motor and the output shaft. The drive train includes an anti-reverse clutch. The anti-reverse clutch is configured to transmit rotation of the motor shaft of the motor in both rotational directions about the first rotational axis to the output shaft. The anti-reverse clutch is further configured to prevent the output shaft from rotating in both rotational directions about the second rotational axis while the output shaft receives an external rotational torque from outside of the electric derailleur motor unit.
    Type: Application
    Filed: October 31, 2013
    Publication date: May 1, 2014
    Applicant: Shimano Inc.
    Inventors: Takafumi KATSURA, Kensuke TAGAYA, Hisashi KAWAMOTO, Yasuhiro UNO
  • Patent number: 7777813
    Abstract: A synchronization separation circuit extracts a synchronization timing signal from a video signal, and a burst gate pulse generator generates a timing pulse signal for gating a color burst signal period. In the color burst signal period restricted by the timing pulse signal, a first counter counts up cycles of a color burst signal at a first timing as a rising edge of the color burst signal and a second counter counts up cycles of the color burst signal at a second timing as a falling edge of the color burst signal. A color burst determination circuit receives count values to determine presence/absence of a color burst signal superimposed on the video signal.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: August 17, 2010
    Assignee: Panasonic Corporation
    Inventors: Yasuhiro Uno, Tooru Kusumi, Yuusuke Okumoto, Youichirou Mori
  • Patent number: 7580078
    Abstract: An input video signal is inputted into a first clamp circuit, and then inputted into a second clamp circuit as a clamped video signal so as to be inputted into a switch circuit. The second clamp circuit uses a clamp pulse for clamping a video signal within the period of the sync signal that has been created by a clamp timing generator in the rear stage, and outputs a clamped video signal. The video signal has been clamped so as to be pulled into a constant DC voltage, and absorbs the waviness of a sag that superimposes the video signal. This video signal makes it possible to gain a sync output signal which has been sync separated from a sync separator circuit and has no jitter in the output.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: August 25, 2009
    Assignee: Panasonic Corporation
    Inventor: Yasuhiro Uno
  • Patent number: 7401170
    Abstract: This communication system performs serial data communication between a master apparatus and a plurality of the slave apparatus via a data transmission line. The master apparatus generates, by using a controller, a serial conversion order control signal for controlling serial conversion order for the data in the slave apparatus, and then transmits the signal to the slave apparatus. The slave apparatus sets up serial conversion order for system information data in accordance with the serial conversion order control signal, then performs serial conversion in accordance with the set-up order, and then transmits the serial conversion data to the master apparatus. The master apparatus can read the system information data in the slave apparatus in the order specified by the serial conversion order control signal.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: July 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Kusumi, Yasuhiro Uno
  • Publication number: 20080114877
    Abstract: Data transmission and reception is effected via a data transmission line between a master device, which is capable of controlling data transfer, and a slave device in synchronism with a clock signal transmitted from the master device to the slave device via a clock transmission line. A signal indicative of the presence or absence of changes in the state of the slave device is sent to a third line connecting the master device to the slave device. The master device effects transmission for the purpose of acquiring data concerning state changes on the slave device side when the signal of the third line indicates that a state change has taken place on the slave device side. The transmission load can be reduced by effecting transmission used by the master device to check data representing the state of the slave device only when necessary.
    Type: Application
    Filed: November 12, 2007
    Publication date: May 15, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoichiro MORI, Yasuhiro UNO, Yukinobu HAMAJIMA
  • Publication number: 20070052848
    Abstract: A synchronization separation circuit extracts a synchronization timing signal from a video signal, and a burst gate pulse generator generates a timing pulse signal for gating a color burst signal period. In the color burst signal period restricted by the timing pulse signal, a first counter counts up cycles of a color burst signal at a first timing as a rising edge of the color burst signal and a second counter counts up cycles of the color burst signal at a second timing as a falling edge of the color burst signal. A color burst determination circuit receives count values to determine presence/absence of a color burst signal superimposed on the video signal.
    Type: Application
    Filed: July 26, 2006
    Publication date: March 8, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Uno, Tooru Kusumi, Yuusuke Okumoto, Youichirou Mori
  • Publication number: 20070016308
    Abstract: This communication system performs serial data communication between a master apparatus and a plurality of the slave apparatus via a data transmission line. The master apparatus generates, by using a controller, a serial conversion order control signal for controlling serial conversion order for the data in the slave apparatus, and then transmits the signal to the slave apparatus. The slave apparatus sets up serial conversion order for system information data in accordance with the serial conversion order control signal, then performs serial conversion in accordance with the set-up order, and then transmits the serial conversion data to the master apparatus. The master apparatus can read the system information data in the slave apparatus in the order specified by the serial conversion order control signal.
    Type: Application
    Filed: July 10, 2006
    Publication date: January 18, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toru Kusumi, Yasuhiro Uno
  • Publication number: 20060164548
    Abstract: An input video signal is inputted into a first clamp circuit, and then inputted into a second clamp circuit as a clamped video signal so as to be inputted into a switch circuit. The second clamp circuit uses a clamp pulse for clamping a video signal within the period of the sync signal that has been created by a clamp timing generator in the rear stage, and outputs a clamped video signal. The video signal has been clamped so as to be pulled into a constant DC voltage, and absorbs the waviness of a sag that superimposes the video signal. This video signal makes it possible to gain a sync output signal which has been sync separated from a sync separator circuit and has no jitter in the output.
    Type: Application
    Filed: January 23, 2006
    Publication date: July 27, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Yasuhiro Uno
  • Patent number: 5774450
    Abstract: An orthogonal frequency division multiplexing signal transmitted from the transmitting end to the receiving end intermittently includes a particular symbol S0 having a predetermined particular pattern in addition to a symbol Sm including data to be transmitted. At the receiving end, the variation in the receiving level and/or the variation in the frequency band of a received signal are detected and corrected on the basis of the received particular symbol S0. Since the particular symbol S0 has a particular pattern, the variation in the level and/or the variation in the frequency are strongly correlated with the variation in the receiving level and/or the variation in the frequency band of the received signal. Consequently, the variation in the receiving level and/or the variation in the frequency band of the received signal can be accurately detected from the particular symbol S0 and consequently high-precision correction can be made.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: June 30, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuo Harada, Tomohiro Kimura, Hiroshi Oue, Yasuo Nagaishi, Hiroshi Hayashino, Yasuhiro Uno
  • Patent number: 5771223
    Abstract: A Fourier transform circuit in a receiver performs a Fourier transform on a orthogonal frequency division multiplexing signal received through a transmission channel for each symbol to sequentially reproduce a received reference vector sequence and a received vector sequence. An interleave circuit interleaves elements of the received reference vector sequence and the received vector sequence. A memory stores the received reference vector sequence. A vector modulation circuit modulates the received reference vector sequence by respective signal point vectors representing each signal point to generate a modulation vector sequence for each symbol. A metric generation circuit then obtains a difference between the received vector sequence and the modulation vector sequence to generate the difference as a branch metric sequence. A trellis decode circuit reproduces a data sequence on the basis of the branch metric sequence.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: June 23, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tomohiro Kimura, Yasuo Harada, Hiroshi Hayashino, Yasuhiro Uno
  • Patent number: 5734972
    Abstract: A pilot signal (a signal having known phase information and a prescribed length) is inserted at a prescribed time interval in a signal transmitted from a transmitting end to a receiving end. An arc tangent operation circuit (22) performs an operation for arc tangent of the pilot signal in a received signal to obtain a phase of the pilot signal. A phase error operation circuit (24) determines for a phase error between the known phase information previously held in a memory (23) and an output from the arc tangent operation circuit (22). A linear approximation circuit (25) takes an output from the phase difference operation circuit (24) as a linear function of time, and linear-approximates the output. A frequency error operation circuit (26) obtains for a frequency error from a slope of an output from the linear approximation circuit (25).
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: March 31, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Hayashino, Yasuo Harada, Tomohiro Kimura, Yasuhiro Uno
  • Patent number: 5682376
    Abstract: A complex multiplier complex-multiplies a carrier modulation signal group for decoding the phases and amplitudes of a plurality of carriers which are orthogonal to each other on the frequency axis by a complex signal group having a predetermined specific pattern which varies in phase at random. An inverse Fourier transformer performs inverse Fourier transformation on an output of the complex multiplier, for transforming a digital signal which is multiplexed on the frequency axis to an OFDM signal on the time axis. A guard interval insertion part adds front and rear guard intervals to front and rear parts of each symbol of the OFDM signal respectively. The front and rear guard intervals include data which are identical to those of rear and front end parts of the corresponding symbol respectively. Arithmetic processing which is reverse to that on a transmission side is performed on a receiving side, whereby distortion of received data is removed.
    Type: Grant
    Filed: December 14, 1995
    Date of Patent: October 28, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Hayashino, Yasuo Harada, Tomohiro Kimura, Yasuhiro Uno, Hiroshi Oue
  • Patent number: 5384517
    Abstract: An electroluminescent element comprising a first electrode, a second electrode, a luminescent layer located between the first electrode and the second electrode and emitting light by application of the AC voltage to the first electrode and the second electrode, a first dielectric layer located between the first electrode and the luminescent layer, a second dielectric layer located between the second electrode and the luminescent layer, and a charge control layer located between the luminescent layer and at least one of the first and second dielectric layers and controlling stored charge accordance with control voltage.
    Type: Grant
    Filed: June 12, 1992
    Date of Patent: January 24, 1995
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Yasuhiro Uno
  • Patent number: 5164799
    Abstract: A thin-film electroluminescent device having a dual dielectric structure, said device comprising a substrate having consecutively thereon a lower electrode, a first dielectric layer, a luminescent layer, a second dielectric layer and an upper electrode, one of a metal oxide film, a metal nitride film and a metal film being interposed either (a) between said luminescent layer and said first dielectric layer or (b) between said luminescent layer and said second dielectric layer or (c) both between said luminescent layer and said first dielectric layer and between said luminescent layer and said second dielectric layer.
    Type: Grant
    Filed: April 25, 1991
    Date of Patent: November 17, 1992
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Yasuhiro Uno
  • Patent number: 3955266
    Abstract: A molding process for casting operations in which castings having a deep concave portion or a high convex portion such as pots and bathtubs are cast using vacuum sealed molds on which films are applied to be in tight contact with them, and a film forming auxiliary device for use in molding such vacuum sealed molds.
    Type: Grant
    Filed: April 26, 1974
    Date of Patent: May 11, 1976
    Assignee: Sintokogio, Ltd.
    Inventors: Norimitsu Honami, Yasuhiro Uno, Tamotsu Ito, Mitsuhide Ogura