Patents by Inventor Yasuhiro Urabe

Yasuhiro Urabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8410817
    Abstract: A level switch circuit receives a digital input signal, and generates a level signal having a voltage level that corresponds to the value of the input signal thus received. A buffer circuit receives a level signal, and outputs the level signal via an output terminal thereof. A bias current generating circuit generates a bias current including a DC component having a constant level and a variable component that changes according to the input signal, and supplies the bias current thus generated to a buffer circuit. The bias current generating circuit detects an edge of the input signal, and raises the bias current by a predetermined amount for a predetermined period of time after the edge thus detected.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: April 2, 2013
    Assignee: Advantest Corporation
    Inventors: Yuji Kuwana, Naoki Matsumoto, Yasuhiro Urabe
  • Patent number: 8368366
    Abstract: Provided is a driver circuit that outputs, from an output end, an output signal corresponding to an input signal supplied thereto, comprising an output resistance section that is provided between a constant voltage source and the output end; an output switching section that switches voltage of the output end according to the input signal; and a switching section that switches a resistance value of the output resistance section. The output resistance section includes an output resistance FET having a source/drain connection between the constant voltage source and the output end, and the switching section supplies a control voltage to a gate of the output resistance FET such that the resistance between the source and the drain of the output resistance FET switches to a designated value.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: February 5, 2013
    Assignee: Advantest Corporation
    Inventors: Yuji Kuwana, Naoki Matsumoto, Yasuhiro Urabe
  • Patent number: 8013626
    Abstract: Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern and supplies the output signal to the device under test; and a measuring section that judges acceptability of the device under test by measuring a response signal output by the device under test. The driver circuit includes an input terminal that receives the input pattern; a switching section that operates according to a logic value of the input pattern to generate the output signal; and an emphasized component generating section that is provided between the input terminal and the switching section, and that (i) generates an emphasized component according to a prescribed high frequency component of the input pattern and (ii) superimposes the emphasized component onto a voltage supplied to the switching section.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: September 6, 2011
    Assignee: Advantest Corporation
    Inventors: Yasuhiro Urabe, Naoki Matsumoto, Yuji Kuwana
  • Publication number: 20110050194
    Abstract: Provided is a driver circuit that outputs, from an output end, an output signal corresponding to an input signal supplied thereto, comprising an output resistance section that is provided between a constant voltage source and the output end; an output switching section that switches voltage of the output end according to the input signal; and a switching section that switches a resistance value of the output resistance section. The output resistance section includes an output resistance FET having a source/drain connection between the constant voltage source and the output end, and the switching section supplies a control voltage to a gate of the output resistance FET such that the resistance between the source and the drain of the output resistance FET switches to a designated value.
    Type: Application
    Filed: September 3, 2009
    Publication date: March 3, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Yuji KUWANA, Naoki MATSUMOTO, Yasuhiro URABE
  • Publication number: 20110043250
    Abstract: A level switch circuit receives a digital input signal, and generates a level signal having a voltage level that corresponds to the value of the input signal thus received. A buffer circuit receives a level signal, and outputs the level signal via an output terminal thereof. A bias current generating circuit generates a bias current including a DC component having a constant level and a variable component that changes according to the input signal, and supplies the bias current thus generated to a buffer circuit. The bias current generating circuit detects an edge of the input signal, and raises the bias current by a predetermined amount for a predetermined period of time after the edge thus detected.
    Type: Application
    Filed: August 17, 2010
    Publication date: February 24, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Yuji KUWANA, Naoki MATSUMOTO, Yasuhiro URABE
  • Publication number: 20100244880
    Abstract: Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern, and supplies the output signal to the device under test; and a measuring section that measures a response signal output by the device under test to judge the acceptability of the device under test, wherein the driver circuit includes an input gate drive section that selects one of a plurality of input drive voltages supplied thereto, according to a logic value of the input pattern, and outputs the selected input drive voltage; a voltage switching section that includes a transistor and that outputs the output signal according to the drain voltage of the transistor, the transistor having a gate terminal that receives the input drive voltage output by the input gate drive section and a source terminal to which is applied a prescribed reference voltage; and an input drive voltage supplying section that generates the input drive voltages according to the
    Type: Application
    Filed: March 27, 2009
    Publication date: September 30, 2010
    Applicant: ADVANTEST CORPORATION
    Inventors: Yasuhiro Urabe, Naoki Matsumoto, Yuji Kuwana
  • Publication number: 20100244884
    Abstract: Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern and supplies the output signal to the device under test; and a measuring section that judges acceptability of the device under test by measuring a response signal output by the device under test. The driver circuit includes an input terminal that receives the input pattern; a switching section that operates according to a logic value of the input pattern to generate the output signal; and an emphasized component generating section that is provided between the input terminal and the switching section, and that (i) generates an emphasized component according to a prescribed high frequency component of the input pattern and (ii) superimposes the emphasized component onto a voltage supplied to the switching section.
    Type: Application
    Filed: March 31, 2009
    Publication date: September 30, 2010
    Applicant: ADVANTEST CORPORATION
    Inventors: YASUHIRO URABE, NAOKI MATSUMOTO, YUJI KUWANA
  • Patent number: 7795897
    Abstract: Provided is a test apparatus that tests a device under test, comprising a driver circuit that generates an output signal according to a prescribed input pattern, and supplies the output signal to the device under test; and a measuring section that measures a response signal output by the device under test to judge the acceptability of the device under test, wherein the driver circuit includes an input gate drive section that selects one of a plurality of input drive voltages supplied thereto, according to a logic value of the input pattern, and outputs the selected input drive voltage; a voltage switching section that includes a transistor and that outputs the output signal according to the drain voltage of the transistor, the transistor having a gate terminal that receives the input drive voltage output by the input gate drive section and a source terminal to which is applied a prescribed reference voltage; and an input drive voltage supplying section that generates the input drive voltages according to the
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: September 14, 2010
    Assignee: Advantest Corporation
    Inventors: Yasuhiro Urabe, Naoki Matsumoto, Yuji Kuwana
  • Patent number: 7119547
    Abstract: A testing apparatus includes a first power supply unit and first and second coaxial cables. The first power supply supplies current to a device under test. The first coaxial cable includes a first internal conductor and a first external conductor. The second coaxial cable includes a second internal conductor and a second external conductor. The first internal conductor and the second external conductor conducts current from the first power supply unit to the device under test. The second internal conductor and the first external conductor conducts current from the device under test to the first power supply unit.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: October 10, 2006
    Assignee: Advantest Corporation
    Inventors: Kunihiro Matsuura, Hiroki Ando, Hironori Tanaka, Yasuhiro Urabe, Satoshi Kodera
  • Patent number: 7098647
    Abstract: A testing apparatus for testing a device under test, includes a power source for generating a current, a coaxial cable unit for supplying the current to the device under test, a detecting unit for detecting a voltage applied to the device under test when the current is supplied to the device under test and a judging unit for judging quality of the device under test based on the detected voltage, wherein the coaxial cable unit includes a first coaxial cable including a first internal conductor and a first external conductor, and a second coaxial cable including a second internal conductor and a second external conductor, wherein the first internal conductor and the second external conductor conduct a current from the power source towards the device under test, and the first external conductor and the second internal conductor conduct a current from the device under test towards the power source.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: August 29, 2006
    Assignee: Advantest Corporation
    Inventors: Hironori Tanaka, Kunihiro Matsuura, Satoshi Kodera, Hiroki Ando, Yasuhiro Urabe
  • Publication number: 20050174105
    Abstract: A testing apparatus includes a first power supply unit for generating a current to be supplied to the device under test and first and second coaxial cables through which the current generated by the first power supply unit is supplied to the device under test, wherein the first power supply unit includes a current detecting unit for detecting an amount of a voltage drop when the current generated by the first power supply unit passes through a predetermined resistor and a current controlling unit for controlling the current being supplied to the device under test in response to the amount of the voltage drop detected by the current detecting unit, the first coaxial cable includes a first internal conductor for conducting the current from the first power supply unit towards the device under test and a first external conductor provided around the first internal conductor with an insulator interposed therebetween for conducting the current from the device under test towards the first power supply unit, and the s
    Type: Application
    Filed: February 10, 2004
    Publication date: August 11, 2005
    Inventors: Kunihiro Matsuura, Hiroki Ando, Hironori Tanaka, Yasuhiro Urabe, Satoshi Kodera
  • Publication number: 20050134255
    Abstract: A testing apparatus for testing a device under test, includes a power source for generating a current, a coaxial cable unit for supplying the current to the device under test, a detecting unit for detecting a voltage applied to the device under test when the current is supplied to the device under test and a judging unit for judging quality of the device under test based on the detected voltage, wherein the coaxial cable unit includes a first coaxial cable including a first internal conductor and a first external conductor, and a second coaxial cable including a second internal conductor and a second external conductor, wherein the first internal conductor and the second external conductor conduct a current from the power source towards the device under test, and the first external conductor and the second internal conductor conduct a current from the device under test towards the power source.
    Type: Application
    Filed: December 17, 2003
    Publication date: June 23, 2005
    Inventors: Hironori Tanaka, Kunihiro Matsuura, Satoshi Kodera, Hiroki Ando, Yasuhiro Urabe