Abstract: A moving image analysis apparatus includes at least one of a processor and a circuitry configured to perform operations including acquiring first data and second data used in processing, in which a moving image is compressed and encoded, for a first frame and a second frame, respectively, included in the moving image, detecting first feature data indicating a first feature of the moving image on the basis of the first frame and the first data and detecting second feature data indicating a second feature of the moving image on the basis of the second frame and the second data, and detecting an object included in the first frame on the basis of the first feature data and the second feature data.

Abstract: A moving image analysis apparatus includes at least one of a processor and a circuitry configured to perform operations including acquiring first data and second data used in processing, in which a moving image is compressed and encoded, for a first frame and a second frame, respectively, included in the moving image, detecting first feature data indicating a first feature of the moving image on the basis of the first frame and the first data and detecting second feature data indicating a second feature of the moving image on the basis of the second frame and the second data, and detecting an object included in the first frame on the basis of the first feature data and the second feature data.

Abstract: A moving image processor includes an encoder configured to encode a moving image; an obtainer configured to obtain data used in a process of compressing the moving image to be encoded by the encoder; a detector configured to detect feature data representing a feature of the moving image from the moving image based on the data obtained by the obtainer; and an outputter configured to output the data encoded by the encoder and the feature data detected by the detector.

Abstract: A main memory and a higher-speed local memory are externally connected to a microprocessor. The entire load module is developed in the main memory. A part or all of the instruction codes in the load module developed in the main memory are stored in the local memory. A memory management unit for data converts a logical address of the entire load module into a physical address of the main memory. A memory management unit for instructions converts a logical address of the instruction code stored in the local memory into a physical address of the local memory. A CPU core gains the instruction code from the local memory at the time of execution of the instruction.

Abstract: A single-chip microcomputer connectable to an external memory for expanding the address space, and having a first mode of operation in which the available memory region is both the region of an internal ROM and the external memory, and having a second mode of operation in which the available memory region is the region of the external memory only. An inhibiting device is provided for inhibiting the switching from the second mode to the first mode, thereby ensuring that the contents of the internal ROM cannot be read-out.

Abstract: A MOS type output driver circuit including an output circuit having first and second MOS type output transistors connected between a voltage supply and ground. The gates of the first and second output transistors are respectively, supplied with first and second drive signals that are mutually inverted. The MOS type output driver circuit further includes a protective circuit for preventing the output transistors from being damaged by overcurrent when the output is shorted to ground.