Patents by Inventor Yasuhito Anzai

Yasuhito Anzai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7829355
    Abstract: A method for inspecting a semiconductor device includes carrying out a first test for inspecting characteristics of semiconductor devices under a shielded (dark) condition to discriminate non-defective devices; and carrying out a second test on the semiconductor devices which have passed the first test as non-defective devices, for inspecting characteristics of the semiconductor devices. The second test is carried out while a predetermined color of light is applied to the semiconductor devices.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: November 9, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Yasuhito Anzai
  • Publication number: 20090042322
    Abstract: According to the present invention, a method for inspecting a semiconductor device includes the steps of carrying out a first test for inspecting characteristic of semiconductor devices under a shielded (dark) condition to discriminate non-defective devices; and carrying out a second test to semiconductor devices, which have been passed the first test as non-defective devices, for inspecting characteristic of the semiconductor devices. The second test is carried out while a predetermined color of light is applied to semiconductor devices.
    Type: Application
    Filed: June 6, 2008
    Publication date: February 12, 2009
    Applicant: OKI ELECTRIC INDUSTRY CO., LTD.
    Inventor: Yasuhito Anzai
  • Patent number: 7335993
    Abstract: A multi chip package includes a first semiconductor chip, a second semiconductor chip and a spacer. The spacer is formed between the first semiconductor chip and the second semiconductor chip. The second semiconductor chip is fixed on the first semiconductor chip by an adhesive material that is formed on the first semiconductor chip. Since the spacer is formed between the first semiconductor chip and the second semiconductor chip, the space between the first semiconductor chip and the second semiconductor chip is even.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: February 26, 2008
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasuhito Anzai
  • Publication number: 20060124873
    Abstract: The invention relates to a substrate detectors ng a substrate presence/absence regardless of substrate material and also of reducing the size increase in the apparatus. There are included a light emitter for emitting light toward a transport path of the substrate such that the light is obliquely incident upon a surface of the substrate, and a light receiver arranged in a position to receive the light passed the transport path of the substrate. The light receiver includes at least a plurality of sensors arranged in series.
    Type: Application
    Filed: November 23, 2005
    Publication date: June 15, 2006
    Inventor: Yasuhito Anzai
  • Patent number: 6872650
    Abstract: A ball electrode forming method comprises steps of: preparing a semiconductor apparatus having a plurality of electrode pads; arranging a mask having an upper surface and a lower surface, an area in the lower surface being larger than an area in the upper surface, and a plurality of openings extended from the upper surface to the lower surface, on a surface of the semiconductor apparatus having the electrode pads formed thereon so that the surface and the lower surface can face each other; arranging solder balls on the electrode pads arranged in the openings from the upper surface side of the mask; and electrically connecting the solder balls to the electrode pads to form ball electrodes. Thus, regarding a method for forming a ball electrode in a semiconductor apparatus having a BGA structure, an efficient ball electrode forming method is employed to prevent omission of a ball electrode.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: March 29, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasuhito Anzai
  • Publication number: 20040053488
    Abstract: A ball electrode forming method comprises steps of: preparing a semiconductor apparatus having a plurality of electrode pads; arranging a mask having an upper surface and a lower surface, an area in the lower surface being larger than an area in the upper surface, and a plurality of openings extended from the upper surface to the lower surface, on a surface of the semiconductor apparatus having the electrode pads formed thereon so that the surface and the lower surface can face each other; arranging solder balls on the electrode pads arranged in the openings from the upper surface side of the mask; and electrically connecting the solder balls to the electrode pads to form ball electrodes. Thus, regarding a method for forming a ball electrode in a semiconductor apparatus having a BGA structure, an efficient ball electrode forming method is employed to prevent omission of a ball electrode.
    Type: Application
    Filed: July 31, 2003
    Publication date: March 18, 2004
    Inventor: Yasuhito Anzai
  • Publication number: 20040032016
    Abstract: A multi chip package includes a first semiconductor chip, a second semiconductor chip and a spacer. The spacer is formed between the first semiconductor chip and the second semiconductor chip. The second semiconductor chips is fixed on the first semiconductor chip by an adhesive material that is formed on the first semiconductor chip. Since the spacer is formed between the first semiconductor chip and the second semiconductor chip, the space between the first semiconductor chip and the second semiconductor chip is evenly.
    Type: Application
    Filed: August 13, 2003
    Publication date: February 19, 2004
    Inventor: Yasuhito Anzai
  • Patent number: 6639860
    Abstract: A method of screening for a non-volatile memory device, including the steps of: controlling the temperature of a memory device at a first level to carry out a first stage of screening; and then, controlling the temperature of a memory device at a second level, which is different from the first level to carry out a second stage of screening.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: October 28, 2003
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasuhito Anzai
  • Publication number: 20030147294
    Abstract: A method of screening for a non-volatile memory device, including the steps of: controlling the temperature of a memory device at a first level to carry out a first stage of screening; and then, controlling the temperature of a memory device at a second level, which is different from the first level to carry out a second stage of screening.
    Type: Application
    Filed: February 6, 2002
    Publication date: August 7, 2003
    Inventor: Yasuhito Anzai
  • Patent number: 6459592
    Abstract: A VLSI package assembly comprising a package substrate carrying thereon an IC chip, a mother board supporting thereon the package substrate, and a connection means for providing electric connection between the substrate and the mother board. The connections means has a high durability against stresses thereby to keep its electric connection even in the face of difference in thermal expansions appearing within the package substrate and mother board.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: October 1, 2002
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasuhito Anzai