Patents by Inventor Yasuhito Shimomura

Yasuhito Shimomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9712070
    Abstract: A power conversion device includes transformers provided with primary windings connected to input terminals and secondary windings including pluralities of single-phase open windings that are insulated to each other; a plurality of converter cells connected to the secondary windings of the transformers; and a control circuit for controlling ON/OFF of switching elements. The converter cells are each include a converter and the inverter that are provided with the switching elements, in which their input ends are connected to the respective single-phase open windings, so that the input ends are connected in mutually parallel fashion, through the transformers, to the input terminal of each phase, and in which their output ends are connected in mutually serial fashion to an output terminal of each phase, to thereby perform three or more-level power conversion.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: July 18, 2017
    Assignee: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventors: Takushi Jimichi, Satoshi Azuma, Kimiyuki Koyanagi, Ritaka Nakamura, Yasuhito Shimomura, Yoshihito Kato
  • Publication number: 20150236603
    Abstract: A power conversion device includes transformers provided with primary windings connected to input terminals and secondary windings including pluralities of single-phase open windings that are insulated to each other; a plurality of converter cells connected to the secondary windings of the transformers; and a control circuit for controlling ON/OFF of switching elements. The converter cells are each include a converter and the inverter that are provided with the switching elements, in which their input ends are connected to the respective single-phase open windings, so that the input ends are connected in mutually parallel fashion, through the transformers, to the input terminal of each phase, and in which their output ends are connected in mutually serial fashion to an output terminal of each phase, to thereby perform three or more-level power conversion.
    Type: Application
    Filed: June 4, 2013
    Publication date: August 20, 2015
    Applicant: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventors: Takushi Jimichi, Satoshi Azuma, Kimiyuki Koyanagi, Ritaka Nakamura, Yasuhito Shimomura, Yoshihito Kato
  • Publication number: 20040240237
    Abstract: A power converter outputting a large current while reducing harmonics flowing into an AC power supply and an AC load. The power converter includes power units, each of which includes an input transformer having at least one primary winding connected with a polyphase AC power supply and at least one secondary winding, a polyphase self-excited rectifier circuit connected with the secondary winding, and a single-phase self-excited inverter circuit connected with the polyphase self-excited rectifier circuit through a DC link circuit to generate a single-phase output. One of single-phase outputs of each power unit is connected with one of single-phase outputs of another power unit so that the outputs of the power units are cascaded in series with one another, with serially connected outputs of the power units connected to a polyphase AC load.
    Type: Application
    Filed: April 14, 2004
    Publication date: December 2, 2004
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hideo Okayama, Yasuhito Shimomura
  • Publication number: 20020185723
    Abstract: In a flat-type semiconductor stack formed by alternately stacking flat-type semiconductor devices (1) and heat-radiating elements (2), a projecting pin (7) is provided on a contact surface of at least one flat-type semiconductor device (1) while a positioning recess (8a) and a guide groove (8) are formed in a contact surface of at least one heat-radiating element (2), the guide groove (8) extending directly from the positioning recess (8a) to a side surface of the heat-radiating element (2). The flat-type semiconductor device (1) is aligned with the heat-radiating element (2) by fitting the pin (7) in the guide groove (8) and sliding the pin (7) along the guide groove (8) until the pin (7) stops to slide at the positioning recess (8a).
    Type: Application
    Filed: December 5, 2001
    Publication date: December 12, 2002
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Hiroaki Yamaguchi, Yasuhito Shimomura
  • Patent number: 6492720
    Abstract: In a flat-type semiconductor stack formed by alternately stacking flat-type semiconductor devices (1) and heat-radiating elements (2), a projecting pin (7) is provided on a contact surface of at least one flat-type semiconductor device (1) while a positioning recess (8a) and a guide groove (8) are formed in a contact surface of at least one heat-radiating element (2), the guide groove (8) extending directly from the positioning recess (8a) to a side surface of the heat-radiating element (2). The flat-type semiconductor device (1) is aligned with the heat-radiating element (2) by fitting the pin (7) in the guide groove (8) and sliding the pin (7) along the guide groove (8) until the pin (7) stops to slide at the positioning recess (8a).
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: December 10, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroaki Yamaguchi, Yasuhito Shimomura