Abstract: A display driver IC (200) comprises: a digital circuit including a logic circuit (2); an output unit (11) for outputting, to the outside, a drive control signal with a level corresponding to the output from the logic circuit; and at least one of a first decision unit (21) for determining whether or not an abnormality is present in the register value in a register in the digital circuit and a second decision unit (22) for determining whether or not the level of the drive control signal is the level corresponding to the output from the logic circuit.

Abstract: A semiconductor device equipped with: a power supply circuit that contains multiple power supply blocks mutually having input/output relationships; a power supply control unit that outputs control signals to each of the power supply blocks indicating On/Off; a fault detection unit; and a sequencer. When the fault detection unit detects that any of the control signals indicates Off during startup of the power supply circuit, the sequencer moves to a prescribed shutdown sequence mode, and the power supply control unit performs a shutdown sequence in which the control signals are output so as to turn off the power supply blocks in a prescribed order.

Abstract: A display driver IC (200) comprises: a digital circuit including a logic circuit (2); an output unit (11) for outputting, to the outside, a drive control signal with a level corresponding to the output from the logic circuit; and at least one of a first decision unit (21) for determining whether or not an abnormality is present in the register value in a register in the digital circuit and a second decision unit (22) for determining whether or not the level of the drive control signal is the level corresponding to the output from the logic circuit.

Abstract: A semiconductor device equipped with: a power supply circuit that contains multiple power supply blocks mutually having input/output relationships; a power supply control unit that outputs control signals to each of the power supply blocks indicating On/Off; a fault detection unit; and a sequencer. When the fault detection unit detects that any of the control signals indicates Off during startup of the power supply circuit, the sequencer moves to a prescribed shutdown sequence mode, and the power supply control unit performs a shutdown sequence in which the control signals are output so as to turn off the power supply blocks in a prescribed order.

Abstract: A liquid crystal display control circuit includes a current reduction rate setting circuit analyzes original gradations of pixels in an input image signal and sets a current reduction rate; a light emitting element control circuit adjusts a drive current of the light emitting element in response to the current reduction rate; a gradation changing circuit generates a display image signal in which the original gradations are changed to the display gradations; and a liquid crystal panel control circuit sets a transmittance of the liquid crystal panel in response to the display gradations of pixels included in the image display signal.

Abstract: A liquid crystal display control circuit includes a current reduction rate setting circuit analyzes original gradations of pixels in an input image signal and sets a current reduction rate; a light emitting element control circuit adjusts a drive current of the light emitting element in response to the current reduction rate; a gradation changing circuit generates a display image signal in which the original gradations are changed to the display gradations; and a liquid crystal panel control circuit sets a transmittance of the liquid crystal panel in response to the display gradations of pixels included in the image display signal.

Abstract: A clock generation circuit includes a PLL circuit 60 and a jitter inducing circuit. The jitter inducing circuit generates a bias current for driving the voltage-controlled oscillator of the PLL circuit and further induces fluctuation in the bias current. The jitter inducing circuit includes an oscillator and a current source. The fluctuation component generated by the oscillator is induced in the bias current. The oscillation frequency of the oscillator is a natural number multiple of the frequency of an input clock signal CKIN.