Patents by Inventor Yasuhito Yoneta

Yasuhito Yoneta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10269842
    Abstract: An image sensor for short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. An anti-reflection or protective layer is formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: April 23, 2019
    Assignees: Hamamatsu Photonics K.K., KLA-Tencor Corporation
    Inventors: Masaharu Muramatsu, Hisanori Suzuki, Yasuhito Yoneta, Shinya Otsuka, Jehn-Huar Chern, David L. Brown, Yung-Ho Alex Chuang, John Fielden, Venkatraman Iyer
  • Publication number: 20190080911
    Abstract: Provided is a wiring structural body provided with a wiring pattern including a through-wiring pattern, the wiring structural body including: a silicon substrate having a through hole in which the through-wiring pattern is disposed; an insulating layer provided on a surface of the silicon substrate including an inner surface of the through hole along at least the wiring pattern; a boron layer provided on the insulating layer along the wiring pattern; and a metal layer provided on the boron layer.
    Type: Application
    Filed: September 1, 2016
    Publication date: March 14, 2019
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Masaharu MURAMATSU, Hisanori SUZUKI, Yasuhito YONETA, Shinya OTSUKA, Hirotaka TAKAHASHI
  • Publication number: 20190080912
    Abstract: Provided is a method for producing a wiring structural body provided with a wiring pattern, the method including a first step of forming an insulating layer on a surface of a silicon substrate along at least a region for forming the wiring pattern, a second step of forming a boron layer on the insulating layer along the region, and a third step of forming a metal layer on the boron layer by plating.
    Type: Application
    Filed: September 1, 2016
    Publication date: March 14, 2019
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Masaharu MURAMATSU, Hisanori SUZUKI, Yasuhito YONETA, Shinya OTSUKA, Hirotaka TAKAHASHI
  • Publication number: 20180286901
    Abstract: A back-illuminated solid-state imaging element includes a semiconductor substrate which has a front surface and a back surface provided with a recess, and in which a thinned section, which is a bottom section of the recess, is an imaging area, a signal read-out circuit formed on the front surface of the semiconductor substrate, a boron layer formed on at least the back surface of the semiconductor substrate and a lateral surface of the recess, a metal layer formed on the boron layer, and provided with an opening opposing a bottom surface of the recess, and an anti-reflection layer formed on the bottom surface of the recess.
    Type: Application
    Filed: July 11, 2016
    Publication date: October 4, 2018
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Masaharu MURAMATSU, Hisanori SUZUKI, Yasuhito YONETA, Shinya OTSUKA, Hirotaka TAKAHASHI
  • Publication number: 20180286752
    Abstract: A method for manufacturing a solid-state imaging device comprises a first step of preparing an imaging element having a second principal surface having an electrode arranged thereon, and a photoelectric converter part configured to photoelectrically convert the incident energy line so as to generate a signal charge; a second step of preparing a support substrate, provided with a through hole extending in a thickness direction thereof, having a third principal surface; a third step of aligning the imaging element and the support substrate with each other so that the electrode is exposed out of the through hole while the second and third principal surfaces oppose each other and joining the imaging element and the support substrate to each other; and a fourth step of arranging a conductive ball-shaped member in the through hole and electrically connecting the ball-shaped member to the electrode after the third step.
    Type: Application
    Filed: June 5, 2018
    Publication date: October 4, 2018
    Inventors: Yasuhito YONETA, Ryoto TAKISAWA, Shingo ISHIHARA, Hisanori SUZUKI, Masaharu MURAMATSU
  • Patent number: 10068800
    Abstract: A method for manufacturing a solid-state imaging device comprises a first step of preparing an imaging element having a second principal surface having an electrode arranged thereon, and a photoelectric converter part configured to photoelectrically convert the incident energy line so as to generate a signal charge; a second step of preparing a support substrate, provided with a through hole extending in a thickness direction thereof, having a third principal surface; a third step of aligning the imaging element and the support substrate with each other so that the electrode is exposed out of the through hole while the second and third principal surfaces oppose each other and joining the imaging element and the support substrate to each other; and a fourth step of arranging a conductive ball-shaped member in the through hole and electrically connecting the ball-shaped member to the electrode after the third step.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: September 4, 2018
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Yasuhito Yoneta, Ryoto Takisawa, Shingo Ishihara, Hisanori Suzuki, Masaharu Muramatsu
  • Patent number: 9967503
    Abstract: Each pixel region PX includes a photoelectric conversion region S1, a resistive gate electrode R, a first transfer electrode T1, a second transfer electrode T2, a barrier region B positioned directly beneath the first transfer electrode T1 in a semiconductor substrate 10, and a charge accumulation region S2 positioned directly beneath the second transfer electrode T2 in the semiconductor substrate 10. An impurity concentration of the barrier region B is lower than an impurity concentration of the charge accumulation region S2, and the first transfer electrode T1 and the second transfer electrode T2 are electrically connected to each other.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: May 8, 2018
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Shin-ichiro Takagi, Yasuhito Yoneta, Hisanori Suzuki, Masaharu Muramatsu
  • Publication number: 20170338257
    Abstract: An image sensor for short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. An anti-reflection or protective layer is formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.
    Type: Application
    Filed: August 4, 2017
    Publication date: November 23, 2017
    Inventors: Masaharu Muramatsu, Hisanori Suzuki, Yasuhito Yoneta, Shinya Otsuka, Jehn-Huar Chern, David L. Brown, Yung-Ho Alex Chuang, John Fielden, Venkatraman Iyer
  • Publication number: 20170301722
    Abstract: A back-illuminated solid-state imaging device includes a semiconductor substrate, a shift register, and a light-shielding film. The semiconductor substrate includes a light incident surface on the back side and a light receiving portion generating a charge in accordance with light incidence. The shift register is disposed on the side of a light-detective surface opposite to the light incident surface of the semiconductor substrate. The light-shielding film is disposed on the side of the light-detective surface of the semiconductor substrate. The light-shielding film includes an uneven surface opposing the light-detective surface.
    Type: Application
    Filed: August 4, 2015
    Publication date: October 19, 2017
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Shin-ichiro TAKAGI, Kentaro MAETA, Yasuhito YONETA, Hisanori SUZUKI, Masaharu MURAMATSU
  • Patent number: 9754995
    Abstract: A method for manufacturing a solid-state imaging device comprises a first step of preparing an imaging element including a second principal surface having an electrode arranged thereon, and a photoelectric converter part configured to photoelectrically convert the incident energy line so as to generate a signal charge; a second step of preparing a support substrate, provided with at least one through hole extending in a thickness direction thereof, having a third principal surface; a third step of aligning the imaging element and the support substrate with each other so that the one electrode is exposed out of the one through hole while the second and third principal surfaces oppose each other and joining the imaging element and the support substrate to each other; and a fourth step of embedding a conductive member in the through hole after the third step.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: September 5, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Yasuhito Yoneta, Ryoto Takisawa, Shingo Ishihara, Hisanori Suzuki, Masaharu Muramatsu
  • Patent number: 9748294
    Abstract: An image sensor for short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. An anti-reflection or protective layer is formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: August 29, 2017
    Assignees: Hamamatsu Photonics K.K., KLA-Tencor Corporation
    Inventors: Masaharu Muramatsu, Hisanori Suzuki, Yasuhito Yoneta, Shinya Otsuka, Jehn-Huar Chem, David L. Brown, Yung-Ho Alex Chuang, John Fielden, Venkatraman Iyer
  • Publication number: 20170229501
    Abstract: A solid-state imaging device includes a plurality of photoelectric converting units and a plurality of charge-accumulating units each accumulating a charge generated in the corresponding photoelectric converting unit. The photoelectric converting unit includes a photosensitive region that generates the charge in accordance with light incidence, and an electric potential gradient forming unit that accelerates migration of charge in a second direction in the photosensitive region. The charge-accumulating unit includes: a plurality of regions (semiconductor layers) having an impurity concentration gradually changed in one way in the second direction, and electrodes adapted to apply electric fields to the plurality of regions. Each of the electrodes is disposed over the plurality of regions having the impurity concentration gradually varied.
    Type: Application
    Filed: August 3, 2015
    Publication date: August 10, 2017
    Applicant: Hamamatsu Photonics K.K.
    Inventors: Shin-ichiro TAKAGI, Kentaro MAETA, Yasuhito YONETA, Hisanori SUZUKI, Masaharu MURAMATSU
  • Patent number: 9609247
    Abstract: A solid-state imaging device 1 according to one embodiment of the present invention is a charge multiplying solid-state imaging device, and includes an imaging area 10 that generates a charge according to the amount of incident light, an output register unit 20 that receives the charge from the imaging area 10, and a multiplication register unit 28 that multiplies the charge from the output register 20, and performs feed-forward control of the multiplication factor of the multiplication register unit 28 according to the charge amount from the imaging area 10.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: March 28, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Hisanori Suzuki, Yasuhito Yoneta, Shin-ichiro Takagi, Kentaro Maeta, Masaharu Muramatsu
  • Patent number: 9559132
    Abstract: A semiconductor substrate is provided with a plurality of photosensitive regions on a first principal surface side. An insulating film has a third principal surface and a fourth principal surface opposed to each other, and is arranged on the semiconductor substrate so that the third principal surface is opposed to the first principal surface. A cross section parallel to a thickness direction of the semiconductor substrate, of a region corresponding to each photosensitive region in the first principal surface is a corrugated shape in which concave curves and convex curves are alternately continuous. A cross section parallel to a thickness direction of the insulating film, of a region corresponding to each photosensitive region in the third principal surface is a corrugated shape in which concave curves and convex curves are alternately continuous corresponding to the first principal surface. The fourth principal surface is flat.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: January 31, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Shin-ichiro Takagi, Yasuhito Yoneta, Kenichi Sugimoto, Hisanori Suzuki, Masaharu Muramatsu
  • Patent number: 9491384
    Abstract: In a solid-state imaging device 1, an overflow gate (OFG) 5 has a predetermined electric resistance value, while voltage application units 161 to 165 are electrically connected to the OFG 5 at connecting parts 171 to 175. Therefore, when voltage values V1 to V5 applied to the connecting parts 171 to 175 by the voltage application units 161 to 165 are adjusted, the OFG 5 can yield higher and lower voltage values in its earlier and later stage parts, respectively. As a result, the barrier level (potential) becomes lower and higher in the earlier and later stage parts, so that all the electric charges generated in an earlier stage side region of photoelectric conversion units 2 can be caused to flow out to an overflow drain (OFD) 4, whereby only the electric charges generated in a later stage side region of the photoelectric conversion units 2 can be TDI-transferred.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: November 8, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Hisanori Suzuki, Yasuhito Yoneta, Kentaro Maeta, Masaharu Muramatsu
  • Publication number: 20160286147
    Abstract: Each pixel region PX includes a photoelectric conversion region S1, a resistive gate electrode R, a first transfer electrode T1, a second transfer electrode T2, a barrier region B positioned directly beneath the first transfer electrode T1 in a semiconductor substrate 10, and a charge accumulation region S2 positioned directly beneath the second transfer electrode T2 in the semiconductor substrate 10. An impurity concentration of the barrier region B is lower than an impurity concentration of the charge accumulation region S2, and the first transfer electrode T1 and the second transfer electrode T2 are electrically connected to each other.
    Type: Application
    Filed: October 31, 2014
    Publication date: September 29, 2016
    Inventors: Shin-ichiro TAKAGI, Yasuhito YONETA, Hisanori SUZUKI, Masaharu MURAMATSU
  • Publication number: 20160268334
    Abstract: An optical detection unit AR is divided so as to have a plurality of pixel regions PX aligned in a column direction. Signals from the plurality of pixel regions PX are integrated for each optical detection unit AR, and output the signal as an electrical signal corresponding to a one-dimensional optical image in time series. Each of the pixel regions PX includes a resistive gate electrode R which promotes transfer of charges in the photoelectric conversion region and a charge accumulation region S2. A drain region ARD is adjacent to the charge accumulation region S2 through a channel region.
    Type: Application
    Filed: October 31, 2014
    Publication date: September 15, 2016
    Inventors: Shin-ichiro TAKAGI, Yasuhito YONETA, Hisanori SUZUKI, Masaharu MURAMATSU
  • Patent number: 9419051
    Abstract: A solid-state imaging device is provided with a plurality of photoelectric converting portions each having a photosensitive region and an electric potential gradient forming region, and which are juxtaposed so as to be along a direction intersecting with a predetermined direction, a plurality of buffer gate portions each arranged corresponding to a photoelectric converting portion and on the side of the other short side forming a planar shape of the photosensitive region, and accumulates a charge generated in the photosensitive region of the corresponding photoelectric converting portion, and a shift register which acquires charges respectively transferred from the plurality of buffer gate portions, and transfers the charges in the direction intersecting with the predetermined direction, to output the charges. The buffer gate portion has at least two gate electrodes to which predetermined electric potentials are respectively applied so as to increase potential toward the predetermined direction.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: August 16, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Shin-ichiro Takagi, Yasuhito Yoneta, Hisanori Suzuki, Masaharu Muramatsu
  • Patent number: 9299860
    Abstract: A solid state imaging device 1 is provided with a photoelectric conversion portion 2 having photosensitive regions 13, and a potential gradient forming portion 3 arranged opposite to the photosensitive regions 13. A planar shape of each photosensitive region 13 is a substantially rectangular shape composed of two long sides and two short sides. The photosensitive regions 13 are juxtaposed in a first direction intersecting with the long sides. The potential gradient forming portion 3 has a first potential gradient forming region to form a potential gradient becoming lower along a second direction from one of the short sides to the other of the short sides, and a second potential gradient forming region to form a potential gradient becoming higher along the second direction. The second potential gradient forming region is arranged next to the first potential gradient forming region in the second direction.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: March 29, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomohiro Ikeya, Yasuhito Yoneta, Hisanori Suzuki, Masaharu Muramatsu
  • Publication number: 20150200216
    Abstract: An image sensor for short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. An anti-reflection or protective layer is formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.
    Type: Application
    Filed: January 7, 2015
    Publication date: July 16, 2015
    Inventors: Masaharu Muramatsu, Hisanori Suzuki, Yasuhito Yoneta, Shinya Otsuka, Jehn-Huar Chem, David L. Brown, Yung-Ho Alex Chuang, John Fielden, Venkatraman Iyer