Patents by Inventor Yasukazu Kimura

Yasukazu Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080296583
    Abstract: A display device includes a capacitive element configured so that a portion of a semiconductor layer which is made conductive constitutes one electrode, an insulation film which covers the semiconductor layer constitutes a dielectric film, and a conductive layer which includes a portion which is formed over the insulation film and is overlapped to the one electrode constitutes another electrode. The conductive layer has an extension portion which extends outside of a region where the semiconductor layer is formed from the inside of the region where the semiconductor layer is formed, and is formed over the insulation film. The insulation film has, in a region where the insulation film is overlapped to both the semiconductor layer and the extension portion of the conductive layer, a film thickness which is larger than a film thickness at a portion thereof which is overlapped to the one electrode.
    Type: Application
    Filed: August 4, 2008
    Publication date: December 4, 2008
    Inventors: Takuo Kaitoh, Eiji Oue, Takahiro Kamo, Yasukazu Kimura, Toshihiko Itoga
  • Patent number: 7407853
    Abstract: The invention provides a method of manufacture of a display device which can achieve a reduction of the manufacturing process. In the manufacturing method, a semiconductor layer is formed over an upper surface of a substrate. An insulation film is formed over an upper surface of the semiconductor layer. Using a mask which covers a first region and exposes a second region, an implantation of impurities into the semiconductor layer is performed in the second region through the insulation film. After the mask is removed, a surface of the insulation film is etched in the first region and the second region to an extent that the insulation film in the second region remains, whereby the film thickness of the insulation film in the second region is set to be smaller than the film thickness of the insulation film in the first region.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: August 5, 2008
    Assignee: Hitachi Displays, Ltd.
    Inventors: Takuo Kaitoh, Eiji Oue, Takahiro Kamo, Yasukazu Kimura, Toshihiko Itoga
  • Patent number: 7388228
    Abstract: Thin film transistors for a display device each include a semiconductor layer made of polysilicon having a channel region, drain and source regions at both sides of the channel region and doped with impurity of high concentration, and an LDD region arranged either between the drain region and the channel region or between the source region and the channel region and doped with impurity of low concentration. An insulation film is formed over an upper surface of the semiconductor layer and has a film thickness which decreases in a step-like manner as it extends to the channel region, the LDD region, the drain and the source regions; and a gate electrode is formed over the channel region through the insulation film. Such a constitution can enhance the numerical aperture and can suppress the magnitude of stepped portions in a periphery of the thin film transistor.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: June 17, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Tanabe, Shigeo Shimomura, Makoto Ohkura, Masaaki Kurita, Yasukazu Kimura, Takao Nakamura
  • Publication number: 20080070351
    Abstract: In a display device manufacturing method including a step of forming a semiconductor film above a substrate and a step of implanting an impurity to each of a first semiconductor film in a first region of the substrate, a second semiconductor film in a second region outside the first region, and a third semiconductor film in a third region outside the first and second regions, the implanting step includes: a first step of forming a first resist above the substrate so as to be thicker in the first region than in the second region, the first resist covering the first and second regions and having an opening in the third region; a second step of implanting an impurity to only the third semiconductor in the third region using the first resist as a mask; a third step of thinning the first resist so as to form a second resist that covers the first region and has an opening in each of second and third regions; a fourth step of implanting an impurity to the second and third semiconductor films in the second and third
    Type: Application
    Filed: September 19, 2007
    Publication date: March 20, 2008
    Inventors: Eiji Oue, Yasukazu Kimura, Daisuke Sonoda, Toshiyuki Matsuura, Takeshi Kuriyagawa
  • Publication number: 20070117292
    Abstract: The present invention provides a display-device-use substrate which is strip-crystallized while minimizing the generation of peeling of a semiconductor by suppressing the generation of aggregation at the time of crystallization due to the radiation of continuous oscillation laser beams. A silicon nitride film and a silicon oxide film which constitutes a background film are formed on a glass substrate on which projecting portions are formed, and a silicon base film is formed on the silicon nitride film and a silicon oxide film. Banks which intersect the scanning directions of laser beams are positioned below the silicon base substrate. The aggregation which is generated by the scanning of laser beams is stopped at a portion after the laser beams gets over the bank and, thereafter, the strip crystal silicon film is formed normally.
    Type: Application
    Filed: November 7, 2006
    Publication date: May 24, 2007
    Inventors: Yasukazu Kimura, Toshihiko Itoga, Takeshi Noda
  • Publication number: 20070097303
    Abstract: A liquid crystal display device that includes a first substrate, a second substrate, and a liquid crystal material sandwiched between the first and second substrates. In the device, the first substrate includes an active element, a first insulation film formed above the active element, a first electrode formed above the first insulation film, a second insulation film formed above the first electrode, and a second electrode formed above the second insulation film.
    Type: Application
    Filed: October 26, 2006
    Publication date: May 3, 2007
    Inventors: Daisuke Sonoda, Takahiro Ochiai, Yasukazu Kimura, Masahiro Maki, Toshio Miyazawa
  • Publication number: 20050242354
    Abstract: Thin film transistors for a display device each include a semiconductor layer made of polysilicon having a channel region, drain and source regions at both sides of the channel region and doped with impurity of high concentration, and an LDD region arranged either between the drain region and the channel region or between the source region and the channel region and doped with impurity of low concentration. An insulation film is formed over an upper surface of the semiconductor layer and has a film thickness which decreases in a step-like manner as it extends to the channel region, the LDD region, the drain and the source regions; and a gate electrode is formed over the channel region through the insulation film. Such a constitution can enhance the numerical aperture and can suppress the magnitude of stepped portions in a periphery of the thin film transistor.
    Type: Application
    Filed: July 6, 2005
    Publication date: November 3, 2005
    Inventors: Hideo Tanabe, Shigeo Shimomura, Makoto Ohkura, Masaaki Kurita, Yasukazu Kimura, Takao Nakamura
  • Publication number: 20050211983
    Abstract: The invention provides a method of manufacture of a display device which can achieve a reduction of the manufacturing process. In the manufacturing method, a semiconductor layer is formed over an upper surface of a substrate. An insulation film is formed over an upper surface of the semiconductor layer. Using a mask which covers a first region and exposes a second region, an implantation of impurities into the semiconductor layer is performed in the second region through the insulation film. After the mask is removed, a surface of the insulation film is etched in the first region and the second region to an extent that the insulation film in the second region remains, whereby the film thickness of the insulation film in the second region is set to be smaller than the film thickness of the insulation film in the first region.
    Type: Application
    Filed: March 11, 2005
    Publication date: September 29, 2005
    Inventors: Takuo Kaitoh, Eiji Oue, Takahiro Kamo, Yasukazu Kimura, Toshihiko Itoga
  • Patent number: 6936847
    Abstract: Thin film transistors for a display device each include a semiconductor layer made of polysilicon having a channel region, drain and source regions at both sides of the channel region and doped with impurity of high concentration, and an LDD region arranged either between the drain region and the channel region or between the source region and the channel region and doped with impurity of low concentration. An insulation film is formed over an upper surface of the semiconductor layer and has a film thickness which decreases in a step-like manner as it extends to the channel region, the LDD region, the drain and the source regions; and a gate electrode is formed over the channel region through the insulation film. Such a constitution can enhance the numerical aperture and can suppress the magnitude of stepped portions in a periphery of the thin film transistor.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: August 30, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Tanabe, Shigeo Shimomura, Makoto Ohkura, Masaaki Kurita, Yasukazu Kimura, Takao Nakamura
  • Publication number: 20030209709
    Abstract: Thin film transistors for a display device each include a semiconductor layer made of polysilicon having a channel region, drain and source regions at both sides of the channel region and doped with impurity of high concentration, and an LDD region arranged either between the drain region and the channel region or between the source region and the channel region and doped with impurity of low concentration. An insulation film is formed over an upper surface of the semiconductor layer and has a film thickness which decreases in a step-like manner as it extends to the channel region, the LDD region, the drain and the source regions; and a gate electrode is formed over the channel region through the insulation film. Such a constitution can enhance the numerical aperture and can suppress the magnitude of stepped portions in a periphery of the thin film transistor.
    Type: Application
    Filed: April 8, 2003
    Publication date: November 13, 2003
    Inventors: Hideo Tanabe, Shigeo Shimomura, Makoto Ohkura, Masaaki Kurita, Yasukazu Kimura, Takao Nakamura
  • Patent number: 6624443
    Abstract: Thin film transistors for a display device each include a semiconductor layer made of polysilicon having a channel region, drain and source regions at both sides of the channel region and doped with impurity of high concentration, and an LDD region arranged either between the drain region and the channel region or between the source region and the channel region and doped with impurity of low concentration. An insulation film is formed over an upper surface of the semiconductor layer and has a film thickness which decreases in a step-like manner as it extends to the channel region, the LDD region, the drain and the source regions; and a gate electrode is formed over the channel region through the insulation film. Such a constitution can enhance the numerical aperture and can suppress the magnitude of stepped portions in a periphery of the thin film transistor.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: September 23, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Tanabe, Shigeo Shimomura, Makoto Ohkura, Masaaki Kurita, Yasukazu Kimura, Takao Nakamura
  • Publication number: 20020104992
    Abstract: Thin film transistors are formed over an insulation substrate which constitutes a display device. Each thin film transistor includes a semiconductor layer made of polysilicon which is comprised of a channel region, drain and source regions which are arranged at both sides of the channel region and are doped with impurity of high concentration, and an LDD region which is arranged at least either between the drain region and the channel region or between the source region and the channel region and are doped with impurity of low concentration, an insulation film which is formed over an upper surface of the semiconductor layer and respectively sequentially decreases a film thickness thereof in a step-like manner as the insulation film is extended to the channel region, the LDD region, the drain and the source regions, and a gate electrode which is formed over the channel region through the insulation film.
    Type: Application
    Filed: February 6, 2002
    Publication date: August 8, 2002
    Inventors: Hideo Tanabe, Shigeo Shimomura, Makoto Ohkura, Masaaki Kurita, Yasukazu Kimura, Takao Nakamura