Abstract: A first base plate includes a plurality of first positioning hole portions, an accommodation portion that accommodates an optical module, a first opening portion, a first pressing portion, and a first engagement portion. A second base plate has a second positioning hole portion that is disposed at a position corresponding to the first positioning hole portion, a second opening portion that is disposed at a predetermined positional relationship with respect to the second positioning hole portion, a second holding portion, a conduction portion, a second pressing portion, a substrate portion, a cover portion, a second hinge portion, and a second engagement portion.

Abstract: A first base plate includes a plurality of first positioning hole portions, an accommodation portion that accommodates an optical module, a first opening portion, a first pressing portion, and a first engagement portion. A second base plate has a second positioning hole portion that is disposed at a position corresponding to the first positioning hole portion, a second opening portion that is disposed at a predetermined positional relationship with respect to the second positioning hole portion, a second holding portion, a conduction portion, a second pressing portion, a substrate portion, a cover portion, a second hinge portion, and a second engagement portion.

Abstract: A mounting structure of a semiconductor device is configured by connecting (i) a first protruding electrode [a bump (A5)] formed on a first electronic component [a substrate (2) or a semiconductor element (A1)] and (ii) a second protruding electrode [a bump (B6)] formed on a second electronic component [a semiconductor element (B11)]. The first protruding electrode and the second protruding electrodes are made of different metal materials. The first protruding electrode is harder than the second protruding electrode, has a pointed end, and is embedded in the second protruding electrode.

Abstract: A semiconductor device of the present invention includes: a circuit substrate; an optical semiconductor element provided on the circuit substrate; and a sealing resin provided on the circuit substrate, with which the optical semiconductor element is sealed, the sealing resin having a cuboid shape or a cubic shape, the sealing resin having an outer shape having at least one cutout part, in a case where a single cutout part is formed, the cutout part being provided in an area other than a center area of a top surface of the sealing resin, in a case where a plurality of cutout parts are provided, the cutout parts are formed so as not to be symmetric with respect to the central point on the top surface. With this arrangement, it is possible to provide a semiconductor device which can secure prevention of a sealing resin from being, in an erroneous direction, fitted into a connector.

Abstract: A semiconductor device of the present invention includes: a circuit substrate; an optical semiconductor element provided on the circuit substrate; and a sealing resin provided on the circuit substrate, with which the optical semiconductor element is sealed, the sealing resin having a cuboid shape or a cubic shape, the sealing resin having an outer shape having at least one cutout part, in a case where a single cutout part is formed, the cutout part being provided in an area other than a center area of a top surface of the sealing resin, in a case where a plurality of cutout parts are provided, the cutout parts are formed so as not to be symmetric with respect to the central point on the top surface. With this arrangement, it is possible to provide a semiconductor device which can secure prevention of a sealing resin from being, in an erroneous direction, fitted into a connector.

Abstract: An adhesive sheet for dicing and die bonding includes a base material and an adhesive layer releasably laminated on said base material, wherein said adhesive layer has a pressure sensitive adhering property at room temperature and a thermosetting property, the elastic modulus of the adhesive layer before thermosetting is 1.0×103 to 1.0×104 Pa, the melt viscosity at 120° C. of the adhesive layer before thermosetting is 100 to 200 Pa·s, and the time required for the melt viscosity to reach its minimum value is 60 sec or less when the adhesive layer before thermosetting is maintained at a constant temperature of 120° C.

Abstract: A semiconductor device of the present invention includes: a laminate structure, including a semiconductor chip, partially sealed with a resin; and a stress relief section for relieving a stress during resin sealing, provided as a convex section including a plain top surface on an uppermost section of the laminate structure, the stress relief section being provided in an annular shape on a peripheral region of the uppermost section so as to come into contact with the sealing resin. This makes it possible to improve the manufacturing yield of the semiconductor device in which the member of the uppermost section is exposed.

Abstract: An adhesive sheet for dicing and die bonding includes a base material and an adhesive layer releasably laminated on said base material, wherein said adhesive layer has a pressure sensitive adhering property at room temperature and a thermosetting property, the elastic modulus of the adhesive layer before thermosetting is 1.0×103 to 1.0×104 Pa, the melt viscosity at 120° C. of the adhesive layer before thermosetting is 100 to 200 Pa·s, and the time required for the melt viscosity to reach its minimum value is 60 sec or less when the adhesive layer before thermosetting is maintained at a constant temperature of 120° C.

Abstract: A semiconductor device of the present invention includes a first semiconductor chip, a second semiconductor chip, and an adhesive layer, sandwiched between the first and second semiconductor chips, which adheres to the first semiconductor chip 2, the first and second semiconductor chips being laminated so that part of the second semiconductor chip protrudes outwards from an outer edge of the first semiconductor chip, the adhesive layer adhering to the first semiconductor chip so as to avoid an outer edge of the first semiconductor chip from which outer edge portion the part of the second semiconductor chip protrudes outwards. This makes it possible to provide a semiconductor device having a highly reliable (durable) laminated structure in which semiconductor chips are laminated.

Abstract: In a semiconductor device in which a second semiconductor chip is layered on a first semiconductor chip mounted on a substrate, a mounting-use bonding layer being formed on a reverse surface of the second semiconductor chip with respect to a circuit formation thereof, the mounting-use bonding layer functions as a bonding agent and as a supporting member for supporting protruded part of the second semiconductor chip, which is protruded from an outer edge of the first semiconductor chip. In this semiconductor device, it is possible to bond the second semiconductor chip and the substrate stably by wire bonding.

Abstract: In a semiconductor device, two or more semiconductor chips are stacked, a first semiconductor chip has electrical contact pads at such positions that form a mirror image of electrical contact pads provided on a second semiconductor chip; and the electrical contact pads on the first semiconductor chip are positioned opposite to and connected to the corresponding electrical contact pads on the second semiconductor chip. Thus, semiconductor chips can be stacked stably. The semiconductor device is reduced in thickness, and a method of stacking semiconductor chips is offered.

Abstract: In a semiconductor device in which a second semiconductor chip is layered on a first semiconductor chip mounted on a substrate, a mounting-use bonding layer being formed on a reverse surface of the second semiconductor chip with respect to a circuit formation thereof, the mounting-use bonding layer functions as a bonding agent and as a supporting member for supporting protruded part of the second semiconductor chip, which is protruded from an outer edge of the first semiconductor chip. In this semiconductor device, it is possible to bond the second semiconductor chip and the substrate stably by wire bonding.

Abstract: A wiring substrate of the present invention includes a terminal section, provided on a first surface of an insulating substrate, for wire or flip-chip bondings; a land section, provided on the insulating substrate, for an external connection terminal; wiring patterns, respectively provided on the first surface and a second surface on the other side of the first surface, for making electrical connection between the terminal section and the land section; and a support pattern, provided on the second surface corresponding in position to the terminal section, for improving bondings. The wiring substrate can relieve connection failure in bondings.

Abstract: A semiconductor device includes a first semiconductor chip and a second semiconductor chip which are laminated on a substrate, wherein electrode terminals which are provided on each of the semiconductor chips are electrically connected to the substrate by first bonding wires and second bonding wires, and an insulation layer is formed between the second bonding wires and the first semiconductor chip.

Abstract: In a semiconductor device, two or more semiconductor chips are stacked, a first semiconductor chip has electrical contact pads at such positions that form a mirror image of electrical contact pads provided on a second semiconductor chip; and the electrical contact pads on the first semiconductor chip are positioned opposite to and connected to the corresponding electrical contact pads on the second semiconductor chip. Thus, semiconductor chips can be stacked stably. The semiconductor device is reduced in thickness, and a method of stacking semiconductor chips is offered.

Abstract: A semiconductor device includes a first semiconductor chip and a second semiconductor chip which are laminated on a substrate, wherein electrode terminals which are provided on each of the semiconductor chips are electrically connected to the substrate by first bonding wires and second bonding wires, and an insulation layer is formed between the second bonding wires and the first semiconductor chip.

Abstract: A first semiconductor chip is produced by affixing a thermo-compression sheet to the back surface of a wafer having a circuit formed on its front surface. The first semiconductor chip is mounted on a circuit board including an insulating substrate and a wiring layer provided on the insulating substrate so that the back surface of the first semiconductor chip faces the circuit board. A second semiconductor chip produced in the same manner as the first semiconductor chip is mounted on the first semiconductor chip with its back surface facing the first semiconductor chip. Each of the first and second semiconductor chips is wire-bonded to the wiring layer with a wire. The first and second semiconductor chips and the wire are sealed with a sealing resin. The wiring layer is connected to external connection terminals through via holes provided in the insulating substrate.

Abstract: A wiring substrate of the present invention includes a terminal section, provided on a first surface of an insulating substrate, for wire or flip-chip bondings; a land section, provided on the insulating substrate, for an external connection terminal; wiring patterns, respectively provided on the first surface and a second surface on the other side of the first surface, for making electrical connection between the terminal section and the land section; and a support pattern, provided on the second surface corresponding in position to the terminal section, for improving bondings. The wiring substrate can relieve connection failure in bondings.

Abstract: A first semiconductor chip is produced by affixing a thermo-compression sheet to the back surface of a wafer having a circuit formed on its front surface. The first semiconductor chip is mounted on a circuit board including an insulating substrate and a wiring layer provided on the insulating substrate so that the back surface of the first semiconductor chip faces the circuit board. A second semiconductor chip produced in the same manner as the first semiconductor chip is mounted on the first semiconductor chip with its back surface facing the first semiconductor chip. Each of the first and second semiconductor chips is wire-bonded to the wiring layer with a wire. The first and second semiconductor chips and the wire are sealed with a sealing resin. The wiring layer is connected to external connection terminals through via holes provided in the insulating substrate.

Abstract: A first semiconductor chip is produced by affixing a thermo-compression sheet to the back surface of a wafer having a circuit formed on its front surface. The first semiconductor chip is mounted on a circuit board including an insulating substrate and a wiring layer provided on the insulating substrate so that the back surface of the first semiconductor chip faces the circuit board. A second semiconductor chip produced in the same manner as the first semiconductor chip is mounted on the first semiconductor chip with its back surface facing the first semiconductor chip. Each of the first and second semiconductor chips is wire-bonded to the wiring layer with a wire. The first and second semiconductor chips and the wire are sealed with a sealing resin. The wiring layer is connected to external connection terminals through via holes provided in the insulating substrate.